MIPS: Rename BranchF functions.

src/mips64/macro-assembler-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <limits.h>  // For LONG_MIN, LONG_MAX.
 
 #include "src/v8.h"
 
 #if V8_TARGET_ARCH_MIPS64
 
@@ skipping 1611 matching lines @@
     madd_d(fd, fr, fs, ft);
   } else {
     // Can not change source regs's value.
     DCHECK(!fr.is(scratch) && !fs.is(scratch) && !ft.is(scratch));
     mul_d(scratch, fs, ft);
     add_d(fd, fr, scratch);
   }
 }
 
 
-void MacroAssembler::BranchFSize(SecondaryField sizeField, Label* target,
-                                 Label* nan, Condition cc, FPURegister cmp1,
-                                 FPURegister cmp2, BranchDelaySlot bd) {
+void MacroAssembler::BranchFCommon(SecondaryField sizeField, Label* target,
+                                   Label* nan, Condition cc, FPURegister cmp1,
+                                   FPURegister cmp2, BranchDelaySlot bd) {
   BlockTrampolinePoolScope block_trampoline_pool(this);
   if (cc == al) {
     Branch(bd, target);
     return;
   }
 
   if (kArchVariant == kMips64r6) {
     sizeField = sizeField == D ? L : W;
   }
   DCHECK(nan || target);
@@ skipping 97 matching lines @@
       }
     }
   }
 
   if (bd == PROTECT) {
     nop();
   }
 }
 
 
-void MacroAssembler::BranchF(Label* target, Label* nan, Condition cc,
-                             FPURegister cmp1, FPURegister cmp2,
-                             BranchDelaySlot bd) {
-  BranchFSize(D, target, nan, cc, cmp1, cmp2, bd);
-}
-
-
-void MacroAssembler::BranchFS(Label* target, Label* nan, Condition cc,
-                              FPURegister cmp1, FPURegister cmp2,
-                              BranchDelaySlot bd) {
-  BranchFSize(S, target, nan, cc, cmp1, cmp2, bd);
-}
-
-
 void MacroAssembler::FmoveLow(FPURegister dst, Register src_low) {
   DCHECK(!src_low.is(at));
   mfhc1(at, dst);
   mtc1(src_low, dst);
   mthc1(at, dst);
 }
 
 
 void MacroAssembler::Move(FPURegister dst, float imm) {
   li(at, Operand(bit_cast<int32_t>(imm)));
@@ skipping 4368 matching lines @@
   }
   if (mag.shift > 0) sra(result, result, mag.shift);
   srl(at, dividend, 31);
   Addu(result, result, Operand(at));
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS64