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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 198 | 198 |
| 199 Cell* RelocInfo::target_cell() { | 199 Cell* RelocInfo::target_cell() { |
| 200 DCHECK(rmode_ == RelocInfo::CELL); | 200 DCHECK(rmode_ == RelocInfo::CELL); |
| 201 return Cell::FromValueAddress(Memory::Address_at(pc_)); | 201 return Cell::FromValueAddress(Memory::Address_at(pc_)); |
| 202 } | 202 } |
| 203 | 203 |
| 204 | 204 |
| 205 void RelocInfo::set_target_cell(Cell* cell, | 205 void RelocInfo::set_target_cell(Cell* cell, |
| 206 WriteBarrierMode write_barrier_mode, | 206 WriteBarrierMode write_barrier_mode, |
| 207 ICacheFlushMode icache_flush_mode) { | 207 ICacheFlushMode icache_flush_mode) { |
| 208 DCHECK(cell->IsCell()); |
| 208 DCHECK(rmode_ == RelocInfo::CELL); | 209 DCHECK(rmode_ == RelocInfo::CELL); |
| 209 Address address = cell->address() + Cell::kValueOffset; | 210 Address address = cell->address() + Cell::kValueOffset; |
| 210 Memory::Address_at(pc_) = address; | 211 Memory::Address_at(pc_) = address; |
| 211 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 212 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
| 212 CpuFeatures::FlushICache(pc_, sizeof(Address)); | 213 CpuFeatures::FlushICache(pc_, sizeof(Address)); |
| 213 } | 214 } |
| 214 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) { | 215 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) { |
| 215 // TODO(1550) We are passing NULL as a slot because cell can never be on | 216 // TODO(1550) We are passing NULL as a slot because cell can never be on |
| 216 // evacuation candidate. | 217 // evacuation candidate. |
| 217 host()->GetHeap()->incremental_marking()->RecordWrite( | 218 host()->GetHeap()->incremental_marking()->RecordWrite( |
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| 583 | 584 |
| 584 | 585 |
| 585 Operand::Operand(Immediate imm) { | 586 Operand::Operand(Immediate imm) { |
| 586 // [disp/r] | 587 // [disp/r] |
| 587 set_modrm(0, ebp); | 588 set_modrm(0, ebp); |
| 588 set_dispr(imm.x_, imm.rmode_); | 589 set_dispr(imm.x_, imm.rmode_); |
| 589 } | 590 } |
| 590 } } // namespace v8::internal | 591 } } // namespace v8::internal |
| 591 | 592 |
| 592 #endif // V8_X87_ASSEMBLER_X87_INL_H_ | 593 #endif // V8_X87_ASSEMBLER_X87_INL_H_ |
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