[turbofan] cleanup InstructionOperand a little

src/compiler/register-allocator.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/linkage.h"
 #include "src/compiler/register-allocator.h"
 #include "src/string-stream.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 147 matching lines @@
                                   InstructionOperand* operand) {
   DCHECK(HasNoSpillType());
   spills_at_definition_ = new (zone)
       SpillAtDefinitionList(gap_index, operand, spills_at_definition_);
 }
 
 
 void LiveRange::CommitSpillsAtDefinition(InstructionSequence* sequence,
                                          InstructionOperand* op,
                                          bool might_be_duplicated) {
+  DCHECK_IMPLIES(op->IsConstant(), spills_at_definition_ == nullptr);
   DCHECK(!IsChild());
   auto zone = sequence->zone();
   for (auto to_spill = spills_at_definition_; to_spill != nullptr;
        to_spill = to_spill->next) {
     auto instr = sequence->InstructionAt(to_spill->gap_index);
     auto move = instr->GetOrCreateParallelMove(Instruction::START, zone);
     // Skip insertion if it's possible that the move exists already as a
     // constraint move from a fixed output register to a slot.
     if (might_be_duplicated) {
       bool found = false;
       auto move_ops = move->move_operands();
       for (auto move_op = move_ops->begin(); move_op != move_ops->end();
            ++move_op) {
         if (move_op->IsEliminated()) continue;
         if (move_op->source()->Equals(to_spill->operand) &&
             move_op->destination()->Equals(op)) {
           found = true;
           break;
         }
       }
       if (found) continue;
     }
     move->AddMove(to_spill->operand, op, zone);
   }
 }
 
 
 void LiveRange::SetSpillOperand(InstructionOperand* operand) {
   DCHECK(HasNoSpillType());
-  DCHECK(!operand->IsUnallocated());
+  DCHECK(!operand->IsUnallocated() && !operand->IsImmediate());
   spill_type_ = SpillType::kSpillOperand;
   spill_operand_ = operand;
 }
 
 
 void LiveRange::SetSpillRange(SpillRange* spill_range) {
   DCHECK(HasNoSpillType() || HasSpillRange());
   DCHECK(spill_range);
   spill_type_ = SpillType::kSpillRange;
   spill_range_ = spill_range;
 }
 
 
-void LiveRange::CommitSpillOperand(InstructionOperand* operand) {
+void LiveRange::CommitSpillOperand(AllocatedOperand* operand) {
   DCHECK(HasSpillRange());
-  DCHECK(!operand->IsUnallocated());
   DCHECK(!IsChild());
   spill_type_ = SpillType::kSpillOperand;
   spill_operand_ = operand;
 }
 
 
 UsePosition* LiveRange::NextUsePosition(LifetimePosition start) {
   UsePosition* use_pos = last_processed_use_;
   if (use_pos == nullptr) use_pos = first_pos();
   while (use_pos != nullptr && use_pos->pos().Value() < start.Value()) {
@@ skipping 43 matching lines @@
   return use_pos->pos().Value() > pos.NextStart().End().Value();
 }
 
 
 InstructionOperand* LiveRange::GetAssignedOperand(
     InstructionOperandCache* cache) const {
   if (HasRegisterAssigned()) {
     DCHECK(!IsSpilled());
     switch (Kind()) {
       case GENERAL_REGISTERS:
-        return cache->RegisterOperand(assigned_register());
+        return cache->GetRegisterOperand(assigned_register());
       case DOUBLE_REGISTERS:
-        return cache->DoubleRegisterOperand(assigned_register());
+        return cache->GetDoubleRegisterOperand(assigned_register());
       default:
         UNREACHABLE();
     }
   }
   DCHECK(IsSpilled());
   DCHECK(!HasRegisterAssigned());
   auto op = TopLevel()->GetSpillOperand();
   DCHECK(!op->IsUnallocated());
   return op;
 }
@@ skipping 240 matching lines @@
                                      InstructionOperand* spill_op) {
   for (auto pos = first_pos(); pos != nullptr; pos = pos->next()) {
     DCHECK(Start().Value() <= pos->pos().Value() &&
            pos->pos().Value() <= End().Value());
     if (!pos->HasOperand()) {
       continue;
     }
     switch (pos->type()) {
       case UsePositionType::kRequiresSlot:
         if (spill_op != nullptr) {
-          pos->operand()->ConvertTo(spill_op->kind(), spill_op->index());
+          InstructionOperand::ReplaceWith(pos->operand(), spill_op);
         }
         break;
       case UsePositionType::kRequiresRegister:
         DCHECK(op->IsRegister() || op->IsDoubleRegister());
       // Fall through.
       case UsePositionType::kAny:
-        pos->operand()->ConvertTo(op->kind(), op->index());
+        InstructionOperand::ReplaceWith(pos->operand(), op);
         break;
     }
   }
 }
 
 
 bool LiveRange::CanCover(LifetimePosition position) const {
   if (IsEmpty()) return false;
   return Start().Value() <= position.Value() &&
          position.Value() < End().Value();
@@ skipping 34 matching lines @@
     } else {
       b = b->next();
     }
   }
   return LifetimePosition::Invalid();
 }
 
 
 InstructionOperandCache::InstructionOperandCache() {
   for (size_t i = 0; i < arraysize(general_register_operands_); ++i) {
-    general_register_operands_[i] =
-        i::compiler::RegisterOperand(static_cast<int>(i));
+    general_register_operands_[i] = RegisterOperand(static_cast<int>(i));
   }
   for (size_t i = 0; i < arraysize(double_register_operands_); ++i) {
-    double_register_operands_[i] =
-        i::compiler::DoubleRegisterOperand(static_cast<int>(i));
+    double_register_operands_[i] = DoubleRegisterOperand(static_cast<int>(i));
   }
 }
 
 
 RegisterAllocator::RegisterAllocator(const RegisterConfiguration* config,
                                      Zone* zone, Frame* frame,
                                      InstructionSequence* code,
                                      const char* debug_name)
     : local_zone_(zone),
       frame_(frame),
@@ skipping 82 matching lines @@
 
 int RegisterAllocator::FixedDoubleLiveRangeID(int index) {
   return -index - 1 - config()->num_general_registers();
 }
 
 
 InstructionOperand* RegisterAllocator::AllocateFixed(
     UnallocatedOperand* operand, int pos, bool is_tagged) {
   TRACE("Allocating fixed reg for op %d\n", operand->virtual_register());
   DCHECK(operand->HasFixedPolicy());
+  InstructionOperand allocated;
   if (operand->HasFixedSlotPolicy()) {
-    operand->ConvertTo(InstructionOperand::STACK_SLOT,
-                       operand->fixed_slot_index());
+    allocated = AllocatedOperand(InstructionOperand::STACK_SLOT,
+                                 operand->fixed_slot_index());
   } else if (operand->HasFixedRegisterPolicy()) {
-    int reg_index = operand->fixed_register_index();
-    operand->ConvertTo(InstructionOperand::REGISTER, reg_index);
+    allocated = AllocatedOperand(InstructionOperand::REGISTER,
+                                 operand->fixed_register_index());
   } else if (operand->HasFixedDoubleRegisterPolicy()) {
-    int reg_index = operand->fixed_register_index();
-    operand->ConvertTo(InstructionOperand::DOUBLE_REGISTER, reg_index);
+    allocated = AllocatedOperand(InstructionOperand::DOUBLE_REGISTER,
+                                 operand->fixed_register_index());
   } else {
     UNREACHABLE();
   }
+  InstructionOperand::ReplaceWith(operand, &allocated);
   if (is_tagged) {
     TRACE("Fixed reg is tagged at %d\n", pos);
     auto instr = InstructionAt(pos);
     if (instr->HasPointerMap()) {
       instr->pointer_map()->RecordPointer(operand, code_zone());
     }
   }
   return operand;
 }
 
@@ skipping 50 matching lines @@
 Instruction* RegisterAllocator::GetLastInstruction(
     const InstructionBlock* block) {
   return code()->InstructionAt(block->last_instruction_index());
 }
 
 
 LiveRange* RegisterAllocator::LiveRangeFor(InstructionOperand* operand) {
   if (operand->IsUnallocated()) {
     return LiveRangeFor(UnallocatedOperand::cast(operand)->virtual_register());
   } else if (operand->IsConstant()) {
-    return LiveRangeFor(ConstantOperand::cast(operand)->index());
+    return LiveRangeFor(ConstantOperand::cast(operand)->virtual_register());
   } else if (operand->IsRegister()) {
-    return FixedLiveRangeFor(operand->index());
+    return FixedLiveRangeFor(RegisterOperand::cast(operand)->index());
   } else if (operand->IsDoubleRegister()) {
-    return FixedDoubleLiveRangeFor(operand->index());
+    return FixedDoubleLiveRangeFor(
+        DoubleRegisterOperand::cast(operand)->index());
   } else {
     return nullptr;
   }
 }
 
 
 void RegisterAllocator::Define(LifetimePosition position,
                                InstructionOperand* operand,
                                InstructionOperand* hint) {
   auto range = LiveRangeFor(operand);
@@ skipping 108 matching lines @@
   }
 
   live_ranges().insert(live_ranges().end(), other->live_ranges().begin(),
                        other->live_ranges().end());
   other->live_ranges().clear();
 
   return true;
 }
 
 
-void SpillRange::SetOperand(InstructionOperand* op) {
+void SpillRange::SetOperand(AllocatedOperand* op) {
   for (auto range : live_ranges()) {
     DCHECK(range->GetSpillRange() == this);
     range->CommitSpillOperand(op);
   }
 }
 
 
 void SpillRange::MergeDisjointIntervals(UseInterval* other) {
   UseInterval* tail = nullptr;
   auto current = use_interval_;
@@ skipping 34 matching lines @@
 
   // Allocate slots for the merged spill ranges.
   for (auto range : spill_ranges()) {
     if (range->IsEmpty()) continue;
     // Allocate a new operand referring to the spill slot.
     auto kind = range->Kind();
     int index = frame()->AllocateSpillSlot(kind == DOUBLE_REGISTERS);
     auto op_kind = kind == DOUBLE_REGISTERS
                        ? InstructionOperand::DOUBLE_STACK_SLOT
                        : InstructionOperand::STACK_SLOT;
-    auto op = InstructionOperand::New(code_zone(), op_kind, index);
+    auto op = AllocatedOperand::New(code_zone(), op_kind, index);
     range->SetOperand(op);
   }
 }
 
 
 void RegisterAllocator::CommitAssignment() {
   for (auto range : live_ranges()) {
     if (range == nullptr || range->IsEmpty()) continue;
     auto assigned = range->GetAssignedOperand(operand_cache());
     InstructionOperand* spill_operand = nullptr;
@@ skipping 119 matching lines @@
     auto output_operand = last_instruction->OutputAt(i);
     DCHECK(!output_operand->IsConstant());
     auto output = UnallocatedOperand::cast(output_operand);
     int output_vreg = output->virtual_register();
     auto range = LiveRangeFor(output_vreg);
     bool assigned = false;
     if (output->HasFixedPolicy()) {
       AllocateFixed(output, -1, false);
       // This value is produced on the stack, we never need to spill it.
       if (output->IsStackSlot()) {
-        DCHECK(output->index() < frame_->GetSpillSlotCount());
-        range->SetSpillOperand(output);
+        DCHECK(StackSlotOperand::cast(output)->index() <
+               frame_->GetSpillSlotCount());
+        range->SetSpillOperand(StackSlotOperand::cast(output));
         range->SetSpillStartIndex(end);
         assigned = true;
       }
 
       for (auto succ : block->successors()) {
         const InstructionBlock* successor = code()->InstructionBlockAt(succ);
         DCHECK(successor->PredecessorCount() == 1);
         int gap_index = successor->first_instruction_index();
         // Create an unconstrained operand for the same virtual register
         // and insert a gap move from the fixed output to the operand.
@@ skipping 21 matching lines @@
   auto first = InstructionAt(instr_index);
   // Handle fixed temporaries.
   for (size_t i = 0; i < first->TempCount(); i++) {
     auto temp = UnallocatedOperand::cast(first->TempAt(i));
     if (temp->HasFixedPolicy()) AllocateFixed(temp, instr_index, false);
   }
   // Handle constant/fixed output operands.
   for (size_t i = 0; i < first->OutputCount(); i++) {
     InstructionOperand* output = first->OutputAt(i);
     if (output->IsConstant()) {
-      int output_vreg = output->index();
+      int output_vreg = ConstantOperand::cast(output)->virtual_register();
       auto range = LiveRangeFor(output_vreg);
       range->SetSpillStartIndex(instr_index + 1);
       range->SetSpillOperand(output);
       continue;
     }
     auto first_output = UnallocatedOperand::cast(output);
     auto range = LiveRangeFor(first_output->virtual_register());
     bool assigned = false;
     if (first_output->HasFixedPolicy()) {
       auto output_copy = first_output->CopyUnconstrained(code_zone());
       bool is_tagged = HasTaggedValue(first_output->virtual_register());
       AllocateFixed(first_output, instr_index, is_tagged);
 
       // This value is produced on the stack, we never need to spill it.
       if (first_output->IsStackSlot()) {
-        DCHECK(first_output->index() < frame_->GetSpillSlotCount());
-        range->SetSpillOperand(first_output);
+        DCHECK(StackSlotOperand::cast(first_output)->index() <
+               frame_->GetSpillSlotCount());
+        range->SetSpillOperand(StackSlotOperand::cast(first_output));
         range->SetSpillStartIndex(instr_index + 1);
         assigned = true;
       }
       AddGapMove(instr_index + 1, Instruction::START, first_output,
                  output_copy);
     }
     // Make sure we add a gap move for spilling (if we have not done
     // so already).
     if (!assigned) {
       range->SpillAtDefinition(local_zone(), instr_index + 1, first_output);
@@ skipping 43 matching lines @@
       // this is not desired, then the pointer map at this instruction needs
       // to be adjusted manually.
     }
   }
 }
 
 
 bool RegisterAllocator::IsOutputRegisterOf(Instruction* instr, int index) {
   for (size_t i = 0; i < instr->OutputCount(); i++) {
     auto output = instr->OutputAt(i);
-    if (output->IsRegister() && output->index() == index) return true;
+    if (output->IsRegister() && RegisterOperand::cast(output)->index() == index)
+      return true;
   }
   return false;
 }
 
 
 bool RegisterAllocator::IsOutputDoubleRegisterOf(Instruction* instr,
                                                  int index) {
   for (size_t i = 0; i < instr->OutputCount(); i++) {
     auto output = instr->OutputAt(i);
-    if (output->IsDoubleRegister() && output->index() == index) return true;
+    if (output->IsDoubleRegister() &&
+        DoubleRegisterOperand::cast(output)->index() == index)
+      return true;
   }
   return false;
 }
 
 
 void RegisterAllocator::ProcessInstructions(const InstructionBlock* block,
                                             BitVector* live) {
   int block_start = block->first_instruction_index();
   auto block_start_position =
       LifetimePosition::GapFromInstructionIndex(block_start);
 
   for (int index = block->last_instruction_index(); index >= block_start;
        index--) {
     auto curr_position =
         LifetimePosition::InstructionFromInstructionIndex(index);
     auto instr = InstructionAt(index);
     DCHECK(instr != nullptr);
     DCHECK(curr_position.IsInstructionPosition());
     // Process output, inputs, and temps of this instruction.
     for (size_t i = 0; i < instr->OutputCount(); i++) {
       auto output = instr->OutputAt(i);
       if (output->IsUnallocated()) {
         // Unsupported.
         DCHECK(!UnallocatedOperand::cast(output)->HasSlotPolicy());
         int out_vreg = UnallocatedOperand::cast(output)->virtual_register();
         live->Remove(out_vreg);
       } else if (output->IsConstant()) {
-        int out_vreg = output->index();
+        int out_vreg = ConstantOperand::cast(output)->virtual_register();
         live->Remove(out_vreg);
       }
       Define(curr_position, output, nullptr);
     }
 
     if (instr->ClobbersRegisters()) {
       for (int i = 0; i < config()->num_general_registers(); ++i) {
         if (!IsOutputRegisterOf(instr, i)) {
           auto range = FixedLiveRangeFor(i);
           range->AddUseInterval(curr_position, curr_position.End(),
@@ skipping 67 matching lines @@
       }
       auto move_ops = move->move_operands();
       for (auto cur = move_ops->begin(); cur != move_ops->end(); ++cur) {
         auto from = cur->source();
         auto to = cur->destination();
         auto hint = to;
         if (to->IsUnallocated()) {
           int to_vreg = UnallocatedOperand::cast(to)->virtual_register();
           auto to_range = LiveRangeFor(to_vreg);
           if (to_range->is_phi()) {
-            DCHECK(!FLAG_turbo_delay_ssa_decon);
             if (to_range->is_non_loop_phi()) {
               hint = to_range->current_hint_operand();
             }
           } else {
             if (live->Contains(to_vreg)) {
               Define(curr_position, to, from);
               live->Remove(to_vreg);
             } else {
               cur->Eliminate();
               continue;
@@ skipping 13 matching lines @@
 
 
 void RegisterAllocator::ResolvePhis(const InstructionBlock* block) {
   for (auto phi : block->phis()) {
     int phi_vreg = phi->virtual_register();
     auto res =
         phi_map_.insert(std::make_pair(phi_vreg, PhiMapValue(phi, block)));
     DCHECK(res.second);
     USE(res);
     auto& output = phi->output();
-    if (!FLAG_turbo_delay_ssa_decon) {
-      for (size_t i = 0; i < phi->operands().size(); ++i) {
-        InstructionBlock* cur_block =
-            code()->InstructionBlockAt(block->predecessors()[i]);
-        AddGapMove(cur_block->last_instruction_index(), Instruction::END,
-                   &phi->inputs()[i], &output);
-        DCHECK(!InstructionAt(cur_block->last_instruction_index())
-                    ->HasPointerMap());
-      }
+    for (size_t i = 0; i < phi->operands().size(); ++i) {
+      InstructionBlock* cur_block =
+          code()->InstructionBlockAt(block->predecessors()[i]);
+      AddGapMove(cur_block->last_instruction_index(), Instruction::END,
+                 &phi->inputs()[i], &output);
+      DCHECK(
+          !InstructionAt(cur_block->last_instruction_index())->HasPointerMap());
     }
     auto live_range = LiveRangeFor(phi_vreg);
     int gap_index = block->first_instruction_index();
     live_range->SpillAtDefinition(local_zone(), gap_index, &output);
     live_range->SetSpillStartIndex(gap_index);
     // We use the phi-ness of some nodes in some later heuristics.
     live_range->set_is_phi(true);
     live_range->set_is_non_loop_phi(!block->IsLoopHeader());
   }
 }
@@ skipping 234 matching lines @@
 };
 
 }  // namespace
 
 
 void RegisterAllocator::ResolveControlFlow() {
   // Lazily linearize live ranges in memory for fast lookup.
   LiveRangeFinder finder(*this);
   for (auto block : code()->instruction_blocks()) {
     if (CanEagerlyResolveControlFlow(block)) continue;
-    if (FLAG_turbo_delay_ssa_decon) {
-      // resolve phis
-      for (auto phi : block->phis()) {
-        auto* block_bound =
-            finder.ArrayFor(phi->virtual_register())->FindSucc(block);
-        auto phi_output =
-            block_bound->range_->GetAssignedOperand(operand_cache());
-        phi->output().ConvertTo(phi_output->kind(), phi_output->index());
-        size_t pred_index = 0;
-        for (auto pred : block->predecessors()) {
-          const InstructionBlock* pred_block = code()->InstructionBlockAt(pred);
-          auto* pred_bound = finder.ArrayFor(phi->operands()[pred_index])
-                                 ->FindPred(pred_block);
-          auto pred_op =
-              pred_bound->range_->GetAssignedOperand(operand_cache());
-          phi->inputs()[pred_index] = *pred_op;
-          ResolveControlFlow(block, phi_output, pred_block, pred_op);
-          pred_index++;
-        }
-      }
-    }
     auto live = live_in_sets_[block->rpo_number().ToInt()];
     BitVector::Iterator iterator(live);
     while (!iterator.Done()) {
       auto* array = finder.ArrayFor(iterator.Current());
       for (auto pred : block->predecessors()) {
         FindResult result;
         const auto* pred_block = code()->InstructionBlockAt(pred);
         array->Find(block, pred_block, &result);
         if (result.cur_cover_ == result.pred_cover_ ||
             result.cur_cover_->IsSpilled())
@@ skipping 40 matching lines @@
 
     // Process the instructions in reverse order, generating and killing
     // live values.
     ProcessInstructions(block, live);
     // All phi output operands are killed by this block.
     for (auto phi : block->phis()) {
       // The live range interval already ends at the first instruction of the
       // block.
       int phi_vreg = phi->virtual_register();
       live->Remove(phi_vreg);
-      if (!FLAG_turbo_delay_ssa_decon) {
-        InstructionOperand* hint = nullptr;
-        InstructionOperand* phi_operand = nullptr;
-        auto instr = GetLastInstruction(
-            code()->InstructionBlockAt(block->predecessors()[0]));
-        auto move = instr->GetParallelMove(Instruction::END);
-        for (int j = 0; j < move->move_operands()->length(); ++j) {
-          auto to = move->move_operands()->at(j).destination();
-          if (to->IsUnallocated() &&
-              UnallocatedOperand::cast(to)->virtual_register() == phi_vreg) {
-            hint = move->move_operands()->at(j).source();
-            phi_operand = to;
-            break;
-          }
+      InstructionOperand* hint = nullptr;
+      InstructionOperand* phi_operand = nullptr;
+      auto instr = GetLastInstruction(
+          code()->InstructionBlockAt(block->predecessors()[0]));
+      auto move = instr->GetParallelMove(Instruction::END);
+      for (int j = 0; j < move->move_operands()->length(); ++j) {
+        auto to = move->move_operands()->at(j).destination();
+        if (to->IsUnallocated() &&
+            UnallocatedOperand::cast(to)->virtual_register() == phi_vreg) {
+          hint = move->move_operands()->at(j).source();
+          phi_operand = to;
+          break;
         }
-        DCHECK(hint != nullptr);
-        auto block_start = LifetimePosition::GapFromInstructionIndex(
-            block->first_instruction_index());
-        Define(block_start, phi_operand, hint);
       }
+      DCHECK(hint != nullptr);
+      auto block_start = LifetimePosition::GapFromInstructionIndex(
+          block->first_instruction_index());
+      Define(block_start, phi_operand, hint);
     }
 
     // Now live is live_in for this block except not including values live
     // out on backward successor edges.
     live_in_sets_[block_id] = live;
 
     if (block->IsLoopHeader()) {
       // Add a live range stretching from the first loop instruction to the last
       // for each value live on entry to the header.
       BitVector::Iterator iterator(live);
@@ skipping 399 matching lines @@
   for (auto cur_inactive : inactive_live_ranges()) {
     DCHECK(cur_inactive->End().Value() > current->Start().Value());
     auto next_intersection = cur_inactive->FirstIntersection(current);
     if (!next_intersection.IsValid()) continue;
     int cur_reg = cur_inactive->assigned_register();
     free_until_pos[cur_reg] = Min(free_until_pos[cur_reg], next_intersection);
   }
 
   auto hint = current->FirstHint();
   if (hint != nullptr && (hint->IsRegister() || hint->IsDoubleRegister())) {
-    int register_index = hint->index();
+    int register_index = AllocatedOperand::cast(hint)->index();
     TRACE("Found reg hint %s (free until [%d) for live range %d (end %d[).\n",
           RegisterName(register_index), free_until_pos[register_index].Value(),
           current->id(), current->End().Value());
 
     // The desired register is free until the end of the current live range.
     if (free_until_pos[register_index].Value() >= current->End().Value()) {
       TRACE("Assigning preferred reg %s to live range %d\n",
             RegisterName(register_index), current->id());
       SetLiveRangeAssignedRegister(current, register_index);
       return true;
@@ skipping 355 matching lines @@
   } else {
     DCHECK(range->Kind() == GENERAL_REGISTERS);
     assigned_registers_->Add(reg);
   }
   range->set_assigned_register(reg, operand_cache());
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8