Implement bigint shift intrinsics on x64.

runtime/vm/assembler_x64.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_X64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/heap.h"
@@ skipping 2281 matching lines @@
   ASSERT(imm.is_int8());
   Operand operand(src);
   EmitOperandREX(dst, operand, REX_W);
   EmitUint8(0x0F);
   EmitUint8(0xA4);
   EmitOperand(src & 7, Operand(dst));
   EmitUint8(imm.value() & 0xFF);
 }
 
 
+void Assembler::shldq(Register dst, Register src, Register shifter) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == RCX);
+  Operand operand(src);
+  EmitOperandREX(dst, operand, REX_W);
+  EmitUint8(0x0F);
+  EmitUint8(0xA5);
+  EmitOperand(src & 7, Operand(dst));
+}
+
+
+void Assembler::shrdq(Register dst, Register src, Register shifter) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == RCX);
+  Operand operand(src);
+  EmitOperandREX(dst, operand, REX_W);
+  EmitUint8(0x0F);
+  EmitUint8(0xAD);
+  EmitOperand(src & 7, Operand(dst));
+}
+
+
 void Assembler::incl(const Address& address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   Operand operand(address);
   EmitOperandREX(0, operand, REX_NONE);
   EmitUint8(0xFF);
   EmitOperand(0, operand);
 }
 
 
 void Assembler::decl(const Address& address) {
@@ skipping 1583 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
   return xmm_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_X64