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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/v8.h" | 5 #include "src/v8.h" |
6 | 6 |
7 #if V8_TARGET_ARCH_MIPS | 7 #if V8_TARGET_ARCH_MIPS |
8 | 8 |
9 #include "src/mips/constants-mips.h" | 9 #include "src/mips/constants-mips.h" |
10 | 10 |
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245 case SLTU: | 245 case SLTU: |
246 case TGE: | 246 case TGE: |
247 case TGEU: | 247 case TGEU: |
248 case TLT: | 248 case TLT: |
249 case TLTU: | 249 case TLTU: |
250 case TEQ: | 250 case TEQ: |
251 case TNE: | 251 case TNE: |
252 case MOVZ: | 252 case MOVZ: |
253 case MOVN: | 253 case MOVN: |
254 case MOVCI: | 254 case MOVCI: |
| 255 case SELEQZ_S: |
| 256 case SELNEZ_S: |
255 return kRegisterType; | 257 return kRegisterType; |
256 default: | 258 default: |
257 return kUnsupported; | 259 return kUnsupported; |
258 } | 260 } |
259 break; | 261 break; |
260 case SPECIAL2: | 262 case SPECIAL2: |
261 switch (FunctionFieldRaw()) { | 263 switch (FunctionFieldRaw()) { |
262 case MUL: | 264 case MUL: |
263 case CLZ: | 265 case CLZ: |
264 return kRegisterType; | 266 return kRegisterType; |
265 default: | 267 default: |
266 return kUnsupported; | 268 return kUnsupported; |
267 } | 269 } |
268 break; | 270 break; |
269 case SPECIAL3: | 271 case SPECIAL3: |
270 switch (FunctionFieldRaw()) { | 272 switch (FunctionFieldRaw()) { |
271 case INS: | 273 case INS: |
272 case EXT: | 274 case EXT: |
273 return kRegisterType; | 275 return kRegisterType; |
274 default: | 276 default: |
275 return kUnsupported; | 277 return kUnsupported; |
276 } | 278 } |
277 break; | 279 break; |
278 case COP1: // Coprocessor instructions. | 280 case COP1: // Coprocessor instructions. |
279 switch (RsFieldRawNoAssert()) { | 281 switch (RsFieldRawNoAssert()) { |
280 case BC1: // Branch on coprocessor condition. | 282 case BC1: // Branch on coprocessor condition. |
281 case BC1EQZ: | 283 case BC1EQZ: |
282 case BC1NEZ: | 284 case BC1NEZ: |
| 285 case SELEQZ_C: |
| 286 case SELNEZ_C: |
283 return kImmediateType; | 287 return kImmediateType; |
284 default: | 288 default: |
285 return kRegisterType; | 289 return kRegisterType; |
286 } | 290 } |
287 break; | 291 break; |
288 case COP1X: | 292 case COP1X: |
289 return kRegisterType; | 293 return kRegisterType; |
290 // 16 bits Immediate type instructions. e.g.: addi dest, src, imm16. | 294 // 16 bits Immediate type instructions. e.g.: addi dest, src, imm16. |
291 case REGIMM: | 295 case REGIMM: |
292 case BEQ: | 296 case BEQ: |
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332 default: | 336 default: |
333 return kUnsupported; | 337 return kUnsupported; |
334 } | 338 } |
335 return kUnsupported; | 339 return kUnsupported; |
336 } | 340 } |
337 | 341 |
338 | 342 |
339 } } // namespace v8::internal | 343 } } // namespace v8::internal |
340 | 344 |
341 #endif // V8_TARGET_ARCH_MIPS | 345 #endif // V8_TARGET_ARCH_MIPS |
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