Index: src/arm/macro-assembler-arm.cc |
diff --git a/src/arm/macro-assembler-arm.cc b/src/arm/macro-assembler-arm.cc |
index b3cacc8cef0460e76c9ce01dcc2b4512ea184fe9..addddd71cb356962ab4db886ab28f71a72c5bad2 100644 |
--- a/src/arm/macro-assembler-arm.cc |
+++ b/src/arm/macro-assembler-arm.cc |
@@ -861,6 +861,21 @@ void MacroAssembler::VFPCanonicalizeNaN(const DwVfpRegister dst, |
} |
+void MacroAssembler::VFPCompareAndSetFlags(const SwVfpRegister src1, |
+ const SwVfpRegister src2, |
+ const Condition cond) { |
+ // Compare and move FPSCR flags to the normal condition flags. |
+ VFPCompareAndLoadFlags(src1, src2, pc, cond); |
+} |
+ |
+void MacroAssembler::VFPCompareAndSetFlags(const SwVfpRegister src1, |
+ const float src2, |
+ const Condition cond) { |
+ // Compare and move FPSCR flags to the normal condition flags. |
+ VFPCompareAndLoadFlags(src1, src2, pc, cond); |
+} |
+ |
+ |
void MacroAssembler::VFPCompareAndSetFlags(const DwVfpRegister src1, |
const DwVfpRegister src2, |
const Condition cond) { |
@@ -876,6 +891,25 @@ void MacroAssembler::VFPCompareAndSetFlags(const DwVfpRegister src1, |
} |
+void MacroAssembler::VFPCompareAndLoadFlags(const SwVfpRegister src1, |
+ const SwVfpRegister src2, |
+ const Register fpscr_flags, |
+ const Condition cond) { |
+ // Compare and load FPSCR. |
+ vcmp(src1, src2, cond); |
+ vmrs(fpscr_flags, cond); |
+} |
+ |
+void MacroAssembler::VFPCompareAndLoadFlags(const SwVfpRegister src1, |
+ const float src2, |
+ const Register fpscr_flags, |
+ const Condition cond) { |
+ // Compare and load FPSCR. |
+ vcmp(src1, src2, cond); |
+ vmrs(fpscr_flags, cond); |
+} |
+ |
+ |
void MacroAssembler::VFPCompareAndLoadFlags(const DwVfpRegister src1, |
const DwVfpRegister src2, |
const Register fpscr_flags, |
@@ -894,6 +928,7 @@ void MacroAssembler::VFPCompareAndLoadFlags(const DwVfpRegister src1, |
vmrs(fpscr_flags, cond); |
} |
+ |
void MacroAssembler::Vmov(const DwVfpRegister dst, |
const double imm, |
const Register scratch) { |