[turbofan] Add backend support for float32 operations.

test/cctest/test-disasm-arm.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 77 matching lines @@
   assm.CheckConstPool(true, false)
 
 
 // Verify that all invocations of the COMPARE macro passed successfully.
 // Exit with a failure if at least one of the tests failed.
 #define VERIFY_RUN() \
 if (failure) { \
     V8_Fatal(__FILE__, __LINE__, "ARM Disassembler tests failed.\n"); \
   }
 
+// clang-format off

[jochen (gone - plz use gerrit), 2015/11/25 13:02:23]

please don't do that. clang-format off is supposed to be used for a scope of
things you want to format differently, not as a blanket thing for an entire file

+
 
 TEST(Type0) {
   SET_UP();
 
   COMPARE(and_(r0, r1, Operand(r2)),
           "e0010002       and r0, r1, r2");
   COMPARE(and_(r1, r2, Operand(r3), LeaveCC),
           "e0021003       and r1, r2, r3");
   COMPARE(and_(r2, r3, Operand(r4), SetCC),
           "e0132004       ands r2, r3, r4");
@@ skipping 365 matching lines @@
     COMPARE(vmov(s0, r0),
             "ee000a10       vmov s0, r0");
     COMPARE(vmov(s31, r10),
             "ee0faa90       vmov s31, r10");
 
     COMPARE(vabs(d0, d1),
             "eeb00bc1       vabs.f64 d0, d1");
     COMPARE(vabs(d3, d4, mi),
             "4eb03bc4       vabsmi.f64 d3, d4");
 
+    COMPARE(vabs(s0, s1),
+            "eeb00ae0       vabs.f32 s0, s1");
+    COMPARE(vabs(s3, s4, mi),
+            "4ef01ac2       vabsmi.f32 s3, s4");
+
     COMPARE(vneg(d0, d1),
             "eeb10b41       vneg.f64 d0, d1");
     COMPARE(vneg(d3, d4, mi),
             "4eb13b44       vnegmi.f64 d3, d4");
 
+    COMPARE(vneg(s0, s1),
+            "eeb10a60       vneg.f32 s0, s1");
+    COMPARE(vneg(s3, s4, mi),
+            "4ef11a42       vnegmi.f32 s3, s4");
+
     COMPARE(vadd(d0, d1, d2),
             "ee310b02       vadd.f64 d0, d1, d2");
     COMPARE(vadd(d3, d4, d5, mi),
             "4e343b05       vaddmi.f64 d3, d4, d5");
 
+    COMPARE(vadd(s0, s1, s2),
+            "ee300a81       vadd.f32 s0, s1, s2");
+    COMPARE(vadd(s3, s4, s5, mi),
+            "4e721a22       vaddmi.f32 s3, s4, s5");
+
     COMPARE(vsub(d0, d1, d2),
             "ee310b42       vsub.f64 d0, d1, d2");
     COMPARE(vsub(d3, d4, d5, ne),
             "1e343b45       vsubne.f64 d3, d4, d5");
 
+    COMPARE(vsub(s0, s1, s2),
+            "ee300ac1       vsub.f32 s0, s1, s2");
+    COMPARE(vsub(s3, s4, s5, ne),
+            "1e721a62       vsubne.f32 s3, s4, s5");
+
     COMPARE(vmul(d2, d1, d0),
             "ee212b00       vmul.f64 d2, d1, d0");
     COMPARE(vmul(d6, d4, d5, cc),
             "3e246b05       vmulcc.f64 d6, d4, d5");
 
+    COMPARE(vmul(s2, s1, s0),
+            "ee201a80       vmul.f32 s2, s1, s0");
+    COMPARE(vmul(s6, s4, s5, cc),
+            "3e223a22       vmulcc.f32 s6, s4, s5");
+
     COMPARE(vdiv(d2, d2, d2),
             "ee822b02       vdiv.f64 d2, d2, d2");
     COMPARE(vdiv(d6, d7, d7, hi),
             "8e876b07       vdivhi.f64 d6, d7, d7");
 
+    COMPARE(vdiv(s2, s2, s2),
+            "ee811a01       vdiv.f32 s2, s2, s2");
+    COMPARE(vdiv(s6, s7, s7, hi),
+            "8e833aa3       vdivhi.f32 s6, s7, s7");
+
     COMPARE(vcmp(d0, d1),
             "eeb40b41       vcmp.f64 d0, d1");
     COMPARE(vcmp(d0, 0.0),
             "eeb50b40       vcmp.f64 d0, #0.0");
 
+    COMPARE(vcmp(s0, s1),
+            "eeb40a60       vcmp.f32 s0, s1");
+    COMPARE(vcmp(s0, 0.0f),
+            "eeb50a40       vcmp.f32 s0, #0.0");
+
     COMPARE(vsqrt(d0, d0),
             "eeb10bc0       vsqrt.f64 d0, d0");
     COMPARE(vsqrt(d2, d3, ne),
             "1eb12bc3       vsqrtne.f64 d2, d3");
 
+    COMPARE(vsqrt(s0, s0),
+            "eeb10ac0       vsqrt.f32 s0, s0");
+    COMPARE(vsqrt(s2, s3, ne),
+            "1eb11ae1       vsqrtne.f32 s2, s3");
+
     COMPARE(vmov(d0, 1.0),
             "eeb70b00       vmov.f64 d0, #1");
     COMPARE(vmov(d2, -13.0),
             "eeba2b0a       vmov.f64 d2, #-13");
 
     COMPARE(vmov(d0, VmovIndexLo, r0),
             "ee000b10       vmov.32 d0[0], r0");
     COMPARE(vmov(d0, VmovIndexHi, r0),
             "ee200b10       vmov.32 d0[1], r0");
 
@@ skipping 65 matching lines @@
     COMPARE(vstm(ia, r6, s0, s31),
             "ec860a20       vstmia r6, {s0-s31}");
     COMPARE(vldm(ia, r7, s0, s31),
             "ec970a20       vldmia r7, {s0-s31}");
 
     COMPARE(vmla(d2, d1, d0),
             "ee012b00       vmla.f64 d2, d1, d0");
     COMPARE(vmla(d6, d4, d5, cc),
             "3e046b05       vmlacc.f64 d6, d4, d5");
 
+    COMPARE(vmla(s2, s1, s0),
+            "ee001a80       vmla.f32 s2, s1, s0");
+    COMPARE(vmla(s6, s4, s5, cc),
+            "3e023a22       vmlacc.f32 s6, s4, s5");
+
     COMPARE(vmls(d2, d1, d0),
             "ee012b40       vmls.f64 d2, d1, d0");
     COMPARE(vmls(d6, d4, d5, cc),
             "3e046b45       vmlscc.f64 d6, d4, d5");
 
+    COMPARE(vmls(s2, s1, s0),
+            "ee001ac0       vmls.f32 s2, s1, s0");
+    COMPARE(vmls(s6, s4, s5, cc),
+            "3e023a62       vmlscc.f32 s6, s4, s5");
+
     COMPARE(vcvt_u32_f64(s0, d0),
             "eebc0bc0       vcvt.u32.f64 s0, d0");
     COMPARE(vcvt_s32_f64(s0, d0),
             "eebd0bc0       vcvt.s32.f64 s0, d0");
     COMPARE(vcvt_f64_u32(d0, s1),
             "eeb80b60       vcvt.f64.u32 d0, s1");
     COMPARE(vcvt_f64_s32(d0, s1),
             "eeb80be0       vcvt.f64.s32 d0, s1");
     COMPARE(vcvt_f32_s32(s0, s2),
             "eeb80ac1       vcvt.f32.s32 s0, s2");
@@ skipping 326 matching lines @@
             "e16dc7ff       strd ip, [sp, #-127]!");
 
     COMPARE(pld(MemOperand(r1, 0)),
             "f5d1f000       pld [r1]");
     COMPARE(pld(MemOperand(r2, 128)),
             "f5d2f080       pld [r2, #+128]");
   }
 
   VERIFY_RUN();
 }