src/compiler/arm/instruction-codes-arm.h - Issue 1044793002: [turbofan] Add backend support for float32 operations.

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Side by Side Diff: src/compiler/arm/instruction-codes-arm.h

Issue 1044793002: [turbofan] Add backend support for float32 operations. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master

Patch Set: Add MachineOperator unit tests. Created 5 years, 8 months ago

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1 // Copyright 2014 the V8 project authors. All rights reserved.	1 // Copyright 2014 the V8 project authors. All rights reserved.

2 // Use of this source code is governed by a BSD-style license that can be	2 // Use of this source code is governed by a BSD-style license that can be

3 // found in the LICENSE file.	3 // found in the LICENSE file.

4	4

5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_	5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_

6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_	6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_

7	7

8 namespace v8 {	8 namespace v8 {

9 namespace internal {	9 namespace internal {

10 namespace compiler {	10 namespace compiler {

(...skipping 26 matching lines...) Expand all Loading...
37 V(ArmBfc) \	37 V(ArmBfc) \

38 V(ArmUbfx) \	38 V(ArmUbfx) \

39 V(ArmSxtb) \	39 V(ArmSxtb) \

40 V(ArmSxth) \	40 V(ArmSxth) \

41 V(ArmSxtab) \	41 V(ArmSxtab) \

42 V(ArmSxtah) \	42 V(ArmSxtah) \

43 V(ArmUxtb) \	43 V(ArmUxtb) \

44 V(ArmUxth) \	44 V(ArmUxth) \

45 V(ArmUxtab) \	45 V(ArmUxtab) \

46 V(ArmUxtah) \	46 V(ArmUxtah) \

	47 V(ArmVcmpF32) \

	48 V(ArmVaddF32) \

	49 V(ArmVsubF32) \

	50 V(ArmVmulF32) \

	51 V(ArmVmlaF32) \

	52 V(ArmVmlsF32) \

	53 V(ArmVdivF32) \

	54 V(ArmVnegF32) \

	55 V(ArmVsqrtF32) \

47 V(ArmVcmpF64) \	56 V(ArmVcmpF64) \

48 V(ArmVaddF64) \	57 V(ArmVaddF64) \

49 V(ArmVsubF64) \	58 V(ArmVsubF64) \

50 V(ArmVmulF64) \	59 V(ArmVmulF64) \

51 V(ArmVmlaF64) \	60 V(ArmVmlaF64) \

52 V(ArmVmlsF64) \	61 V(ArmVmlsF64) \

53 V(ArmVdivF64) \	62 V(ArmVdivF64) \

54 V(ArmVmodF64) \	63 V(ArmVmodF64) \

55 V(ArmVnegF64) \	64 V(ArmVnegF64) \

56 V(ArmVsqrtF64) \	65 V(ArmVsqrtF64) \

(...skipping 44 matching lines...) Expand 10 before \| Expand all \| Expand 10 after Loading...
101 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \	110 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \

102 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \	111 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \

103 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \	112 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \

104 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */	113 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */

105	114

106 } // namespace compiler	115 } // namespace compiler

107 } // namespace internal	116 } // namespace internal

108 } // namespace v8	117 } // namespace v8

109	118

110 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_	119 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_

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