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Side by Side Diff: runtime/vm/assembler_arm_test.cc

Issue 1043943002: A few fixes for ARMv5TE. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 5 years, 8 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/os.h" 10 #include "vm/os.h"
(...skipping 92 matching lines...) Expand 10 before | Expand all | Expand 10 after
103 __ mov(R1, Operand(41)); 103 __ mov(R1, Operand(41));
104 __ vmovsrr(S1, R1, R3); // S1:S2 = 41:43 104 __ vmovsrr(S1, R1, R3); // S1:S2 = 41:43
105 __ vmovs(S0, S2); // S0 = S2, S0:S1 == 43:41 105 __ vmovs(S0, S2); // S0 = S2, S0:S1 == 43:41
106 __ vmovd(D2, D0); // D2 = D0, S4:S5 == 43:41 106 __ vmovd(D2, D0); // D2 = D0, S4:S5 == 43:41
107 __ vmovrs(R3, S5); // R3 = S5, R3 == 41 107 __ vmovrs(R3, S5); // R3 = S5, R3 == 41
108 __ vmovrrs(R1, R2, S4); // R1:R2 = S4:S5, R1:R2 == 43:41 108 __ vmovrrs(R1, R2, S4); // R1:R2 = S4:S5, R1:R2 == 43:41
109 __ vmovdrr(D3, R3, R2); // D3 = R3:R2, S6:S7 == 41:41 109 __ vmovdrr(D3, R3, R2); // D3 = R3:R2, S6:S7 == 41:41
110 __ vmovdr(D3, 1, R1); // D3[1] == S7 = R1, S6:S7 == 41:43 110 __ vmovdr(D3, 1, R1); // D3[1] == S7 = R1, S6:S7 == 41:43
111 __ vmovrrd(R0, R1, D3); // R0:R1 = D3, R0:R1 == 41:43 111 __ vmovrrd(R0, R1, D3); // R0:R1 = D3, R0:R1 == 41:43
112 __ sub(R0, R1, Operand(R0)); // 43-41 112 __ sub(R0, R1, Operand(R0)); // 43-41
113 } else {
114 __ LoadImmediate(R0, 2);
115 } 113 }
116 __ bx(LR); 114 __ bx(LR);
117 } 115 }
118 116
119 117
120 ASSEMBLER_TEST_RUN(Vmov, test) { 118 ASSEMBLER_TEST_RUN(Vmov, test) {
121 EXPECT(test != NULL); 119 EXPECT(test != NULL);
122 typedef int (*Vmov)() DART_UNUSED; 120 if (TargetCPUFeatures::vfp_supported()) {
123 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(Vmov, test->entry())); 121 typedef int (*Vmov)() DART_UNUSED;
122 EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(Vmov, test->entry()));
123 }
124 } 124 }
125 125
126 126
127 ASSEMBLER_TEST_GENERATE(SingleVLoadStore, assembler) { 127 ASSEMBLER_TEST_GENERATE(SingleVLoadStore, assembler) {
128 if (TargetCPUFeatures::vfp_supported()) { 128 if (TargetCPUFeatures::vfp_supported()) {
129 __ LoadImmediate(R0, bit_cast<int32_t, float>(12.3f)); 129 __ LoadImmediate(R0, bit_cast<int32_t, float>(12.3f));
130 __ mov(R2, Operand(SP)); 130 __ mov(R2, Operand(SP));
131 __ str(R0, Address(SP, (-kWordSize * 30), Address::PreIndex)); 131 __ str(R0, Address(SP, (-kWordSize * 30), Address::PreIndex));
132 __ vldrs(S0, Address(R2, (-kWordSize * 30))); 132 __ vldrs(S0, Address(R2, (-kWordSize * 30)));
133 __ vadds(S0, S0, S0); 133 __ vadds(S0, S0, S0);
134 __ vstrs(S0, Address(R2, (-kWordSize * 30))); 134 __ vstrs(S0, Address(R2, (-kWordSize * 30)));
135 __ ldr(R0, Address(SP, (kWordSize * 30), Address::PostIndex)); 135 __ ldr(R0, Address(SP, (kWordSize * 30), Address::PostIndex));
136 } else {
137 __ LoadImmediate(R0, 0);
138 } 136 }
139 __ bx(LR); 137 __ bx(LR);
140 } 138 }
141 139
142 140
143 ASSEMBLER_TEST_RUN(SingleVLoadStore, test) { 141 ASSEMBLER_TEST_RUN(SingleVLoadStore, test) {
144 EXPECT(test != NULL); 142 EXPECT(test != NULL);
145 if (TargetCPUFeatures::vfp_supported()) { 143 if (TargetCPUFeatures::vfp_supported()) {
146 typedef float (*SingleVLoadStore)() DART_UNUSED; 144 typedef float (*SingleVLoadStore)() DART_UNUSED;
147 float res = EXECUTE_TEST_CODE_FLOAT(SingleVLoadStore, test->entry()); 145 float res = EXECUTE_TEST_CODE_FLOAT(SingleVLoadStore, test->entry());
148 EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f); 146 EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f);
149 } else {
150 typedef int (*SingleVLoadStore)() DART_UNUSED;
151 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SingleVLoadStore, test->entry()));
152 } 147 }
153 } 148 }
154 149
155 150
156 ASSEMBLER_TEST_GENERATE(SingleVShiftLoadStore, assembler) { 151 ASSEMBLER_TEST_GENERATE(SingleVShiftLoadStore, assembler) {
157 if (TargetCPUFeatures::vfp_supported()) { 152 if (TargetCPUFeatures::vfp_supported()) {
158 __ LoadImmediate(R0, bit_cast<int32_t, float>(12.3f)); 153 __ LoadImmediate(R0, bit_cast<int32_t, float>(12.3f));
159 __ mov(R2, Operand(SP)); 154 __ mov(R2, Operand(SP));
160 // Expressing __str(R0, Address(SP, (-kWordSize * 32), Address::PreIndex)); 155 // Expressing __str(R0, Address(SP, (-kWordSize * 32), Address::PreIndex));
161 // as: 156 // as:
162 __ mov(R1, Operand(kWordSize)); 157 __ mov(R1, Operand(kWordSize));
163 __ str(R0, Address(SP, R1, LSL, 5, Address::NegPreIndex)); 158 __ str(R0, Address(SP, R1, LSL, 5, Address::NegPreIndex));
164 __ vldrs(S0, Address(R2, (-kWordSize * 32))); 159 __ vldrs(S0, Address(R2, (-kWordSize * 32)));
165 __ vadds(S0, S0, S0); 160 __ vadds(S0, S0, S0);
166 __ vstrs(S0, Address(R2, (-kWordSize * 32))); 161 __ vstrs(S0, Address(R2, (-kWordSize * 32)));
167 // Expressing __ldr(R0, Address(SP, (kWordSize * 32), Address::PostIndex)); 162 // Expressing __ldr(R0, Address(SP, (kWordSize * 32), Address::PostIndex));
168 // as: 163 // as:
169 __ ldr(R0, Address(SP, R1, LSL, 5, Address::PostIndex)); 164 __ ldr(R0, Address(SP, R1, LSL, 5, Address::PostIndex));
170 } else {
171 __ LoadImmediate(R0, 0);
172 } 165 }
173 __ bx(LR); 166 __ bx(LR);
174 } 167 }
175 168
176 169
177 ASSEMBLER_TEST_RUN(SingleVShiftLoadStore, test) { 170 ASSEMBLER_TEST_RUN(SingleVShiftLoadStore, test) {
178 EXPECT(test != NULL); 171 EXPECT(test != NULL);
179 if (TargetCPUFeatures::vfp_supported()) { 172 if (TargetCPUFeatures::vfp_supported()) {
180 typedef float (*SingleVLoadStore)() DART_UNUSED; 173 typedef float (*SingleVLoadStore)() DART_UNUSED;
181 float res = EXECUTE_TEST_CODE_FLOAT(SingleVLoadStore, test->entry()); 174 float res = EXECUTE_TEST_CODE_FLOAT(SingleVLoadStore, test->entry());
182 EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f); 175 EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f);
183 } else {
184 typedef int (*SingleVLoadStore)() DART_UNUSED;
185 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SingleVLoadStore, test->entry()));
186 } 176 }
187 } 177 }
188 178
189 179
190 ASSEMBLER_TEST_GENERATE(DoubleVLoadStore, assembler) { 180 ASSEMBLER_TEST_GENERATE(DoubleVLoadStore, assembler) {
191 if (TargetCPUFeatures::vfp_supported()) { 181 if (TargetCPUFeatures::vfp_supported()) {
192 int64_t value = bit_cast<int64_t, double>(12.3); 182 int64_t value = bit_cast<int64_t, double>(12.3);
193 __ LoadImmediate(R0, Utils::Low32Bits(value)); 183 __ LoadImmediate(R0, Utils::Low32Bits(value));
194 __ LoadImmediate(R1, Utils::High32Bits(value)); 184 __ LoadImmediate(R1, Utils::High32Bits(value));
195 __ mov(R2, Operand(SP)); 185 __ mov(R2, Operand(SP));
196 __ str(R0, Address(SP, (-kWordSize * 30), Address::PreIndex)); 186 __ str(R0, Address(SP, (-kWordSize * 30), Address::PreIndex));
197 __ str(R1, Address(R2, (-kWordSize * 29))); 187 __ str(R1, Address(R2, (-kWordSize * 29)));
198 __ vldrd(D0, Address(R2, (-kWordSize * 30))); 188 __ vldrd(D0, Address(R2, (-kWordSize * 30)));
199 __ vaddd(D0, D0, D0); 189 __ vaddd(D0, D0, D0);
200 __ vstrd(D0, Address(R2, (-kWordSize * 30))); 190 __ vstrd(D0, Address(R2, (-kWordSize * 30)));
201 __ ldr(R1, Address(R2, (-kWordSize * 29))); 191 __ ldr(R1, Address(R2, (-kWordSize * 29)));
202 __ ldr(R0, Address(SP, (kWordSize * 30), Address::PostIndex)); 192 __ ldr(R0, Address(SP, (kWordSize * 30), Address::PostIndex));
203 } else {
204 __ LoadImmediate(R0, 0);
205 } 193 }
206 __ bx(LR); 194 __ bx(LR);
207 } 195 }
208 196
209 197
210 ASSEMBLER_TEST_RUN(DoubleVLoadStore, test) { 198 ASSEMBLER_TEST_RUN(DoubleVLoadStore, test) {
211 EXPECT(test != NULL); 199 EXPECT(test != NULL);
212 if (TargetCPUFeatures::vfp_supported()) { 200 if (TargetCPUFeatures::vfp_supported()) {
213 typedef double (*DoubleVLoadStore)() DART_UNUSED; 201 typedef double (*DoubleVLoadStore)() DART_UNUSED;
214 float res = EXECUTE_TEST_CODE_DOUBLE(DoubleVLoadStore, test->entry()); 202 float res = EXECUTE_TEST_CODE_DOUBLE(DoubleVLoadStore, test->entry());
215 EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f); 203 EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f);
216 } else {
217 typedef int (*DoubleVLoadStore)() DART_UNUSED;
218 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleVLoadStore, test->entry()));
219 } 204 }
220 } 205 }
221 206
222 207
223 ASSEMBLER_TEST_GENERATE(SingleFPOperations, assembler) { 208 ASSEMBLER_TEST_GENERATE(SingleFPOperations, assembler) {
224 if (TargetCPUFeatures::vfp_supported()) { 209 if (TargetCPUFeatures::vfp_supported()) {
225 __ LoadSImmediate(S0, 12.3f); 210 __ LoadSImmediate(S0, 12.3f);
226 __ LoadSImmediate(S1, 3.4f); 211 __ LoadSImmediate(S1, 3.4f);
227 __ vnegs(S0, S0); // -12.3f 212 __ vnegs(S0, S0); // -12.3f
228 __ vabss(S0, S0); // 12.3f 213 __ vabss(S0, S0); // 12.3f
229 __ vadds(S0, S0, S1); // 15.7f 214 __ vadds(S0, S0, S1); // 15.7f
230 __ vmuls(S0, S0, S1); // 53.38f 215 __ vmuls(S0, S0, S1); // 53.38f
231 __ vsubs(S0, S0, S1); // 49.98f 216 __ vsubs(S0, S0, S1); // 49.98f
232 __ vdivs(S0, S0, S1); // 14.7f 217 __ vdivs(S0, S0, S1); // 14.7f
233 __ vsqrts(S0, S0); // 3.8340579f 218 __ vsqrts(S0, S0); // 3.8340579f
234 } else {
235 __ LoadImmediate(R0, 0);
236 } 219 }
237 __ bx(LR); 220 __ bx(LR);
238 } 221 }
239 222
240 223
241 ASSEMBLER_TEST_RUN(SingleFPOperations, test) { 224 ASSEMBLER_TEST_RUN(SingleFPOperations, test) {
242 EXPECT(test != NULL); 225 EXPECT(test != NULL);
243 if (TargetCPUFeatures::vfp_supported()) { 226 if (TargetCPUFeatures::vfp_supported()) {
244 typedef float (*SingleFPOperations)() DART_UNUSED; 227 typedef float (*SingleFPOperations)() DART_UNUSED;
245 float res = EXECUTE_TEST_CODE_FLOAT(SingleFPOperations, test->entry()); 228 float res = EXECUTE_TEST_CODE_FLOAT(SingleFPOperations, test->entry());
246 EXPECT_FLOAT_EQ(3.8340579f, res, 0.001f); 229 EXPECT_FLOAT_EQ(3.8340579f, res, 0.001f);
247 } else {
248 typedef int (*SingleFPOperations)() DART_UNUSED;
249 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SingleFPOperations, test->entry()));
250 } 230 }
251 } 231 }
252 232
253 233
254 ASSEMBLER_TEST_GENERATE(DoubleFPOperations, assembler) { 234 ASSEMBLER_TEST_GENERATE(DoubleFPOperations, assembler) {
255 if (TargetCPUFeatures::vfp_supported()) { 235 if (TargetCPUFeatures::vfp_supported()) {
256 __ LoadDImmediate(D0, 12.3, R0); 236 __ LoadDImmediate(D0, 12.3, R0);
257 __ LoadDImmediate(D1, 3.4, R0); 237 __ LoadDImmediate(D1, 3.4, R0);
258 __ vnegd(D0, D0); // -12.3 238 __ vnegd(D0, D0); // -12.3
259 __ vabsd(D0, D0); // 12.3 239 __ vabsd(D0, D0); // 12.3
260 __ vaddd(D0, D0, D1); // 15.7 240 __ vaddd(D0, D0, D1); // 15.7
261 __ vmuld(D0, D0, D1); // 53.38 241 __ vmuld(D0, D0, D1); // 53.38
262 __ vsubd(D0, D0, D1); // 49.98 242 __ vsubd(D0, D0, D1); // 49.98
263 __ vdivd(D0, D0, D1); // 14.7 243 __ vdivd(D0, D0, D1); // 14.7
264 __ vsqrtd(D0, D0); // 3.8340579 244 __ vsqrtd(D0, D0); // 3.8340579
265 } else {
266 __ LoadImmediate(R0, 0);
267 } 245 }
268 __ bx(LR); 246 __ bx(LR);
269 } 247 }
270 248
271 249
272 ASSEMBLER_TEST_RUN(DoubleFPOperations, test) { 250 ASSEMBLER_TEST_RUN(DoubleFPOperations, test) {
273 EXPECT(test != NULL); 251 EXPECT(test != NULL);
274 if (TargetCPUFeatures::vfp_supported()) { 252 if (TargetCPUFeatures::vfp_supported()) {
275 typedef double (*DoubleFPOperations)() DART_UNUSED; 253 typedef double (*DoubleFPOperations)() DART_UNUSED;
276 double res = EXECUTE_TEST_CODE_DOUBLE(DoubleFPOperations, test->entry()); 254 double res = EXECUTE_TEST_CODE_DOUBLE(DoubleFPOperations, test->entry());
277 EXPECT_FLOAT_EQ(3.8340579, res, 0.001); 255 EXPECT_FLOAT_EQ(3.8340579, res, 0.001);
278 } else {
279 typedef int (*DoubleFPOperations)() DART_UNUSED;
280 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleFPOperations, test->entry()));
281 } 256 }
282 } 257 }
283 258
284 259
285 ASSEMBLER_TEST_GENERATE(DoubleSqrtNeg, assembler) { 260 ASSEMBLER_TEST_GENERATE(DoubleSqrtNeg, assembler) {
286 if (TargetCPUFeatures::vfp_supported()) { 261 if (TargetCPUFeatures::vfp_supported()) {
287 // Check that sqrt of a negative double gives NaN. 262 // Check that sqrt of a negative double gives NaN.
288 __ LoadDImmediate(D1, -1.0, R0); 263 __ LoadDImmediate(D1, -1.0, R0);
289 __ vsqrtd(D0, D1); 264 __ vsqrtd(D0, D1);
290 __ vcmpd(D0, D0); 265 __ vcmpd(D0, D0);
291 __ vmstat(); 266 __ vmstat();
292 __ mov(R0, Operand(1), VS); 267 __ mov(R0, Operand(1), VS);
293 __ mov(R0, Operand(0), VC); 268 __ mov(R0, Operand(0), VC);
294 } else {
295 __ LoadImmediate(R0, 1);
296 } 269 }
297 __ Ret(); 270 __ Ret();
298 } 271 }
299 272
300 273
301 ASSEMBLER_TEST_RUN(DoubleSqrtNeg, test) { 274 ASSEMBLER_TEST_RUN(DoubleSqrtNeg, test) {
302 EXPECT(test != NULL); 275 EXPECT(test != NULL);
303 typedef int (*DoubleSqrtNeg)() DART_UNUSED; 276 if (TargetCPUFeatures::vfp_supported()) {
304 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(DoubleSqrtNeg, test->entry())); 277 typedef int (*DoubleSqrtNeg)() DART_UNUSED;
278 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(DoubleSqrtNeg, test->entry()));
279 }
305 } 280 }
306 281
307 282
308 ASSEMBLER_TEST_GENERATE(IntToDoubleConversion, assembler) { 283 ASSEMBLER_TEST_GENERATE(IntToDoubleConversion, assembler) {
309 if (TargetCPUFeatures::vfp_supported()) { 284 if (TargetCPUFeatures::vfp_supported()) {
310 __ mov(R3, Operand(6)); 285 __ mov(R3, Operand(6));
311 __ vmovsr(S3, R3); 286 __ vmovsr(S3, R3);
312 __ vcvtdi(D0, S3); 287 __ vcvtdi(D0, S3);
313 } else {
314 __ LoadImmediate(R0, 0);
315 } 288 }
316 __ bx(LR); 289 __ bx(LR);
317 } 290 }
318 291
319 292
320 ASSEMBLER_TEST_RUN(IntToDoubleConversion, test) { 293 ASSEMBLER_TEST_RUN(IntToDoubleConversion, test) {
321 EXPECT(test != NULL); 294 EXPECT(test != NULL);
322 if (TargetCPUFeatures::vfp_supported()) { 295 if (TargetCPUFeatures::vfp_supported()) {
323 typedef double (*IntToDoubleConversionCode)() DART_UNUSED; 296 typedef double (*IntToDoubleConversionCode)() DART_UNUSED;
324 double res = EXECUTE_TEST_CODE_DOUBLE(IntToDoubleConversionCode, 297 double res = EXECUTE_TEST_CODE_DOUBLE(IntToDoubleConversionCode,
325 test->entry()); 298 test->entry());
326 EXPECT_FLOAT_EQ(6.0, res, 0.001); 299 EXPECT_FLOAT_EQ(6.0, res, 0.001);
327 } else {
328 typedef int (*IntToDoubleConversionCode)() DART_UNUSED;
329 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(IntToDoubleConversionCode,
330 test->entry()));
331 } 300 }
332 } 301 }
333 302
334 303
335 ASSEMBLER_TEST_GENERATE(LongToDoubleConversion, assembler) { 304 ASSEMBLER_TEST_GENERATE(LongToDoubleConversion, assembler) {
336 if (TargetCPUFeatures::vfp_supported()) { 305 if (TargetCPUFeatures::vfp_supported()) {
337 int64_t value = 60000000000LL; 306 int64_t value = 60000000000LL;
338 __ LoadImmediate(R0, Utils::Low32Bits(value)); 307 __ LoadImmediate(R0, Utils::Low32Bits(value));
339 __ LoadImmediate(R1, Utils::High32Bits(value)); 308 __ LoadImmediate(R1, Utils::High32Bits(value));
340 __ vmovsr(S0, R0); 309 __ vmovsr(S0, R0);
341 __ vmovsr(S2, R1); 310 __ vmovsr(S2, R1);
342 __ vcvtdu(D0, S0); 311 __ vcvtdu(D0, S0);
343 __ vcvtdi(D1, S2); 312 __ vcvtdi(D1, S2);
344 __ LoadDImmediate(D2, 1.0 * (1LL << 32), R0); 313 __ LoadDImmediate(D2, 1.0 * (1LL << 32), R0);
345 __ vmlad(D0, D1, D2); 314 __ vmlad(D0, D1, D2);
346 } else {
347 __ LoadImmediate(R0, 0);
348 } 315 }
349 __ bx(LR); 316 __ bx(LR);
350 } 317 }
351 318
352 319
353 ASSEMBLER_TEST_RUN(LongToDoubleConversion, test) { 320 ASSEMBLER_TEST_RUN(LongToDoubleConversion, test) {
354 EXPECT(test != NULL); 321 EXPECT(test != NULL);
355 if (TargetCPUFeatures::vfp_supported()) { 322 if (TargetCPUFeatures::vfp_supported()) {
356 typedef double (*LongToDoubleConversionCode)() DART_UNUSED; 323 typedef double (*LongToDoubleConversionCode)() DART_UNUSED;
357 double res = EXECUTE_TEST_CODE_DOUBLE(LongToDoubleConversionCode, 324 double res = EXECUTE_TEST_CODE_DOUBLE(LongToDoubleConversionCode,
358 test->entry()); 325 test->entry());
359 EXPECT_FLOAT_EQ(60000000000.0, res, 0.001); 326 EXPECT_FLOAT_EQ(60000000000.0, res, 0.001);
360 } else {
361 typedef int (*LongToDoubleConversionCode)() DART_UNUSED;
362 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(LongToDoubleConversionCode,
363 test->entry()));
364 } 327 }
365 } 328 }
366 329
367 330
368 ASSEMBLER_TEST_GENERATE(IntToFloatConversion, assembler) { 331 ASSEMBLER_TEST_GENERATE(IntToFloatConversion, assembler) {
369 if (TargetCPUFeatures::vfp_supported()) { 332 if (TargetCPUFeatures::vfp_supported()) {
370 __ mov(R3, Operand(6)); 333 __ mov(R3, Operand(6));
371 __ vmovsr(S3, R3); 334 __ vmovsr(S3, R3);
372 __ vcvtsi(S0, S3); 335 __ vcvtsi(S0, S3);
373 } else {
374 __ LoadImmediate(R0, 0);
375 } 336 }
376 __ bx(LR); 337 __ bx(LR);
377 } 338 }
378 339
379 340
380 ASSEMBLER_TEST_RUN(IntToFloatConversion, test) { 341 ASSEMBLER_TEST_RUN(IntToFloatConversion, test) {
381 EXPECT(test != NULL); 342 EXPECT(test != NULL);
382 if (TargetCPUFeatures::vfp_supported()) { 343 if (TargetCPUFeatures::vfp_supported()) {
383 typedef float (*IntToFloatConversionCode)() DART_UNUSED; 344 typedef float (*IntToFloatConversionCode)() DART_UNUSED;
384 float res = EXECUTE_TEST_CODE_FLOAT(IntToFloatConversionCode, 345 float res = EXECUTE_TEST_CODE_FLOAT(IntToFloatConversionCode,
385 test->entry()); 346 test->entry());
386 EXPECT_FLOAT_EQ(6.0, res, 0.001); 347 EXPECT_FLOAT_EQ(6.0, res, 0.001);
387 } else {
388 typedef int (*IntToFloatConversionCode)() DART_UNUSED;
389 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(IntToFloatConversionCode,
390 test->entry()));
391 } 348 }
392 } 349 }
393 350
394 351
395 ASSEMBLER_TEST_GENERATE(FloatToIntConversion, assembler) { 352 ASSEMBLER_TEST_GENERATE(FloatToIntConversion, assembler) {
396 if (TargetCPUFeatures::vfp_supported()) { 353 if (TargetCPUFeatures::vfp_supported()) {
397 __ vcvtis(S1, S0); 354 __ vcvtis(S1, S0);
398 __ vmovrs(R0, S1); 355 __ vmovrs(R0, S1);
399 } else {
400 __ LoadImmediate(R0, 0);
401 } 356 }
402 __ bx(LR); 357 __ bx(LR);
403 } 358 }
404 359
405 360
406 ASSEMBLER_TEST_RUN(FloatToIntConversion, test) { 361 ASSEMBLER_TEST_RUN(FloatToIntConversion, test) {
407 EXPECT(test != NULL); 362 EXPECT(test != NULL);
408 if (TargetCPUFeatures::vfp_supported()) { 363 if (TargetCPUFeatures::vfp_supported()) {
409 typedef int (*FloatToIntConversion)(float arg) DART_UNUSED; 364 typedef int (*FloatToIntConversion)(float arg) DART_UNUSED;
410 EXPECT_EQ(12, 365 EXPECT_EQ(12,
411 EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(), 366 EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
412 12.8f)); 367 12.8f));
413 EXPECT_EQ(INT_MIN, 368 EXPECT_EQ(INT_MIN,
414 EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(), 369 EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
415 -FLT_MAX)); 370 -FLT_MAX));
416 EXPECT_EQ(INT_MAX, 371 EXPECT_EQ(INT_MAX,
417 EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(), 372 EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
418 FLT_MAX)); 373 FLT_MAX));
419 } else {
420 typedef int (*FloatToIntConversion)() DART_UNUSED;
421 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(FloatToIntConversion, test->entry()));
422 } 374 }
423 } 375 }
424 376
425 377
426 ASSEMBLER_TEST_GENERATE(DoubleToIntConversion, assembler) { 378 ASSEMBLER_TEST_GENERATE(DoubleToIntConversion, assembler) {
427 if (TargetCPUFeatures::vfp_supported()) { 379 if (TargetCPUFeatures::vfp_supported()) {
428 __ vcvtid(S0, D0); 380 __ vcvtid(S0, D0);
429 __ vmovrs(R0, S0); 381 __ vmovrs(R0, S0);
430 } else {
431 __ LoadImmediate(R0, 0);
432 } 382 }
433 __ bx(LR); 383 __ bx(LR);
434 } 384 }
435 385
436 386
437 ASSEMBLER_TEST_RUN(DoubleToIntConversion, test) { 387 ASSEMBLER_TEST_RUN(DoubleToIntConversion, test) {
438 if (TargetCPUFeatures::vfp_supported()) { 388 if (TargetCPUFeatures::vfp_supported()) {
439 typedef int (*DoubleToIntConversion)(double arg) DART_UNUSED; 389 typedef int (*DoubleToIntConversion)(double arg) DART_UNUSED;
440 EXPECT(test != NULL); 390 EXPECT(test != NULL);
441 EXPECT_EQ(12, 391 EXPECT_EQ(12,
442 EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(), 392 EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
443 12.8)); 393 12.8));
444 EXPECT_EQ(INT_MIN, 394 EXPECT_EQ(INT_MIN,
445 EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(), 395 EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
446 -DBL_MAX)); 396 -DBL_MAX));
447 EXPECT_EQ(INT_MAX, 397 EXPECT_EQ(INT_MAX,
448 EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(), 398 EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
449 DBL_MAX)); 399 DBL_MAX));
450 } else {
451 typedef int (*DoubleToIntConversion)() DART_UNUSED;
452 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleToIntConversion, test->entry()));
453 } 400 }
454 } 401 }
455 402
456 403
457 ASSEMBLER_TEST_GENERATE(FloatToDoubleConversion, assembler) { 404 ASSEMBLER_TEST_GENERATE(FloatToDoubleConversion, assembler) {
458 __ LoadSImmediate(S2, 12.8f); 405 if (TargetCPUFeatures::vfp_supported()) {
459 __ vcvtds(D0, S2); 406 __ LoadSImmediate(S2, 12.8f);
407 __ vcvtds(D0, S2);
408 }
460 __ bx(LR); 409 __ bx(LR);
461 } 410 }
462 411
463 412
464 ASSEMBLER_TEST_RUN(FloatToDoubleConversion, test) { 413 ASSEMBLER_TEST_RUN(FloatToDoubleConversion, test) {
465 typedef double (*FloatToDoubleConversionCode)() DART_UNUSED; 414 if (TargetCPUFeatures::vfp_supported()) {
466 EXPECT(test != NULL); 415 typedef double (*FloatToDoubleConversionCode)() DART_UNUSED;
467 double res = EXECUTE_TEST_CODE_DOUBLE(FloatToDoubleConversionCode, 416 EXPECT(test != NULL);
468 test->entry()); 417 double res = EXECUTE_TEST_CODE_DOUBLE(FloatToDoubleConversionCode,
469 EXPECT_FLOAT_EQ(12.8, res, 0.001); 418 test->entry());
419 EXPECT_FLOAT_EQ(12.8, res, 0.001);
420 }
470 } 421 }
471 422
472 423
473 ASSEMBLER_TEST_GENERATE(DoubleToFloatConversion, assembler) { 424 ASSEMBLER_TEST_GENERATE(DoubleToFloatConversion, assembler) {
474 if (TargetCPUFeatures::vfp_supported()) { 425 if (TargetCPUFeatures::vfp_supported()) {
475 __ LoadDImmediate(D1, 12.8, R0); 426 __ LoadDImmediate(D1, 12.8, R0);
476 __ vcvtsd(S0, D1); 427 __ vcvtsd(S0, D1);
477 } else {
478 __ LoadImmediate(R0, 0);
479 } 428 }
480 __ bx(LR); 429 __ bx(LR);
481 } 430 }
482 431
483 432
484 ASSEMBLER_TEST_RUN(DoubleToFloatConversion, test) { 433 ASSEMBLER_TEST_RUN(DoubleToFloatConversion, test) {
485 EXPECT(test != NULL); 434 EXPECT(test != NULL);
486 if (TargetCPUFeatures::vfp_supported()) { 435 if (TargetCPUFeatures::vfp_supported()) {
487 typedef float (*DoubleToFloatConversionCode)() DART_UNUSED; 436 typedef float (*DoubleToFloatConversionCode)() DART_UNUSED;
488 float res = EXECUTE_TEST_CODE_FLOAT(DoubleToFloatConversionCode, 437 float res = EXECUTE_TEST_CODE_FLOAT(DoubleToFloatConversionCode,
489 test->entry()); 438 test->entry());
490 EXPECT_FLOAT_EQ(12.8, res, 0.001); 439 EXPECT_FLOAT_EQ(12.8, res, 0.001);
491 } else {
492 typedef int (*DoubleToFloatConversionCode)() DART_UNUSED;
493 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleToFloatConversionCode,
494 test->entry()));
495 } 440 }
496 } 441 }
497 442
498 443
499 ASSEMBLER_TEST_GENERATE(FloatCompare, assembler) { 444 ASSEMBLER_TEST_GENERATE(FloatCompare, assembler) {
500 if (TargetCPUFeatures::vfp_supported()) { 445 if (TargetCPUFeatures::vfp_supported()) {
501 // Test 12.3f vs 12.5f. 446 // Test 12.3f vs 12.5f.
502 __ LoadSImmediate(S0, 12.3f); 447 __ LoadSImmediate(S0, 12.3f);
503 __ LoadSImmediate(S1, 12.5f); 448 __ LoadSImmediate(S1, 12.5f);
504 449
505 // Count errors in R0. R0 is zero if no errors found. 450 // Count errors in R0. R0 is zero if no errors found.
506 __ mov(R0, Operand(0)); 451 __ mov(R0, Operand(0));
507 __ vcmps(S0, S1); 452 __ vcmps(S0, S1);
508 __ vmstat(); 453 __ vmstat();
509 __ add(R0, R0, Operand(1), VS); // Error if unordered (Nan). 454 __ add(R0, R0, Operand(1), VS); // Error if unordered (Nan).
510 __ add(R0, R0, Operand(2), GT); // Error if greater. 455 __ add(R0, R0, Operand(2), GT); // Error if greater.
511 __ add(R0, R0, Operand(4), EQ); // Error if equal. 456 __ add(R0, R0, Operand(4), EQ); // Error if equal.
512 __ add(R0, R0, Operand(8), PL); // Error if not less. 457 __ add(R0, R0, Operand(8), PL); // Error if not less.
513 458
514 // Test NaN. 459 // Test NaN.
515 // Create NaN by dividing 0.0f/0.0f. 460 // Create NaN by dividing 0.0f/0.0f.
516 __ LoadSImmediate(S1, 0.0f); 461 __ LoadSImmediate(S1, 0.0f);
517 __ vdivs(S1, S1, S1); 462 __ vdivs(S1, S1, S1);
518 __ vcmps(S1, S1); 463 __ vcmps(S1, S1);
519 __ vmstat(); 464 __ vmstat();
520 // Error if not unordered (not Nan). 465 // Error if not unordered (not Nan).
521 __ add(R0, R0, Operand(16), VC); 466 __ add(R0, R0, Operand(16), VC);
522 } else {
523 __ LoadImmediate(R0, 0);
524 } 467 }
525 // R0 is 0 if all tests passed. 468 // R0 is 0 if all tests passed.
526 __ bx(LR); 469 __ bx(LR);
527 } 470 }
528 471
529 472
530 ASSEMBLER_TEST_RUN(FloatCompare, test) { 473 ASSEMBLER_TEST_RUN(FloatCompare, test) {
531 EXPECT(test != NULL); 474 EXPECT(test != NULL);
532 typedef int (*FloatCompare)() DART_UNUSED; 475 if (TargetCPUFeatures::vfp_supported()) {
533 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(FloatCompare, test->entry())); 476 typedef int (*FloatCompare)() DART_UNUSED;
477 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(FloatCompare, test->entry()));
478 }
534 } 479 }
535 480
536 481
537 ASSEMBLER_TEST_GENERATE(DoubleCompare, assembler) { 482 ASSEMBLER_TEST_GENERATE(DoubleCompare, assembler) {
538 if (TargetCPUFeatures::vfp_supported()) { 483 if (TargetCPUFeatures::vfp_supported()) {
539 // Test 12.3 vs 12.5. 484 // Test 12.3 vs 12.5.
540 __ LoadDImmediate(D0, 12.3, R1); 485 __ LoadDImmediate(D0, 12.3, R1);
541 __ LoadDImmediate(D1, 12.5, R1); 486 __ LoadDImmediate(D1, 12.5, R1);
542 487
543 // Count errors in R0. R0 is zero if no errors found. 488 // Count errors in R0. R0 is zero if no errors found.
544 __ mov(R0, Operand(0)); 489 __ mov(R0, Operand(0));
545 __ vcmpd(D0, D1); 490 __ vcmpd(D0, D1);
546 __ vmstat(); 491 __ vmstat();
547 __ add(R0, R0, Operand(1), VS); // Error if unordered (Nan). 492 __ add(R0, R0, Operand(1), VS); // Error if unordered (Nan).
548 __ add(R0, R0, Operand(2), GT); // Error if greater. 493 __ add(R0, R0, Operand(2), GT); // Error if greater.
549 __ add(R0, R0, Operand(4), EQ); // Error if equal. 494 __ add(R0, R0, Operand(4), EQ); // Error if equal.
550 __ add(R0, R0, Operand(8), PL); // Error if not less. 495 __ add(R0, R0, Operand(8), PL); // Error if not less.
551 496
552 // Test NaN. 497 // Test NaN.
553 // Create NaN by dividing 0.0/0.0. 498 // Create NaN by dividing 0.0/0.0.
554 __ LoadDImmediate(D1, 0.0, R1); 499 __ LoadDImmediate(D1, 0.0, R1);
555 __ vdivd(D1, D1, D1); 500 __ vdivd(D1, D1, D1);
556 __ vcmpd(D1, D1); 501 __ vcmpd(D1, D1);
557 __ vmstat(); 502 __ vmstat();
558 // Error if not unordered (not Nan). 503 // Error if not unordered (not Nan).
559 __ add(R0, R0, Operand(16), VC); 504 __ add(R0, R0, Operand(16), VC);
560 } else {
561 __ LoadImmediate(R0, 0);
562 } 505 }
563 // R0 is 0 if all tests passed. 506 // R0 is 0 if all tests passed.
564 __ bx(LR); 507 __ bx(LR);
565 } 508 }
566 509
567 510
568 ASSEMBLER_TEST_RUN(DoubleCompare, test) { 511 ASSEMBLER_TEST_RUN(DoubleCompare, test) {
569 EXPECT(test != NULL); 512 EXPECT(test != NULL);
570 typedef int (*DoubleCompare)() DART_UNUSED; 513 if (TargetCPUFeatures::vfp_supported()) {
571 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleCompare, test->entry())); 514 typedef int (*DoubleCompare)() DART_UNUSED;
515 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleCompare, test->entry()));
516 }
572 } 517 }
573 518
574 519
575 ASSEMBLER_TEST_GENERATE(Loop, assembler) { 520 ASSEMBLER_TEST_GENERATE(Loop, assembler) {
576 Label loop_entry; 521 Label loop_entry;
577 __ mov(R0, Operand(1)); 522 __ mov(R0, Operand(1));
578 __ mov(R1, Operand(2)); 523 __ mov(R1, Operand(2));
579 __ Bind(&loop_entry); 524 __ Bind(&loop_entry);
580 __ mov(R0, Operand(R0, LSL, 1)); 525 __ mov(R0, Operand(R0, LSL, 1));
581 __ movs(R1, Operand(R1, LSR, 1)); 526 __ movs(R1, Operand(R1, LSR, 1));
(...skipping 78 matching lines...) Expand 10 before | Expand all | Expand 10 after
660 605
661 606
662 ASSEMBLER_TEST_RUN(LoadStore, test) { 607 ASSEMBLER_TEST_RUN(LoadStore, test) {
663 EXPECT(test != NULL); 608 EXPECT(test != NULL);
664 typedef int (*LoadStore)() DART_UNUSED; 609 typedef int (*LoadStore)() DART_UNUSED;
665 EXPECT_EQ(123, EXECUTE_TEST_CODE_INT32(LoadStore, test->entry())); 610 EXPECT_EQ(123, EXECUTE_TEST_CODE_INT32(LoadStore, test->entry()));
666 } 611 }
667 612
668 613
669 ASSEMBLER_TEST_GENERATE(Semaphore, assembler) { 614 ASSEMBLER_TEST_GENERATE(Semaphore, assembler) {
670 if (TargetCPUFeatures::arm_version() == ARMv5TE) { 615 if (TargetCPUFeatures::arm_version() != ARMv5TE) {
671 __ mov(R0, Operand(42));
672 __ bx(LR);
673 } else {
674 __ mov(R0, Operand(40)); 616 __ mov(R0, Operand(40));
675 __ mov(R1, Operand(42)); 617 __ mov(R1, Operand(42));
676 __ Push(R0); 618 __ Push(R0);
677 Label retry; 619 Label retry;
678 __ Bind(&retry); 620 __ Bind(&retry);
679 __ ldrex(R0, SP); 621 __ ldrex(R0, SP);
680 __ strex(IP, R1, SP); // IP == 0, success 622 __ strex(IP, R1, SP); // IP == 0, success
681 __ tst(IP, Operand(0)); 623 __ tst(IP, Operand(0));
682 __ b(&retry, NE); // NE if context switch occurred between ldrex and strex. 624 __ b(&retry, NE); // NE if context switch occurred between ldrex and strex.
683 __ Pop(R0); // 42 625 __ Pop(R0); // 42
684 __ bx(LR);
685 } 626 }
627 __ bx(LR);
686 } 628 }
687 629
688 630
689 ASSEMBLER_TEST_RUN(Semaphore, test) { 631 ASSEMBLER_TEST_RUN(Semaphore, test) {
690 EXPECT(test != NULL); 632 EXPECT(test != NULL);
691 typedef int (*Semaphore)() DART_UNUSED; 633 if (TargetCPUFeatures::arm_version() != ARMv5TE) {
692 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry())); 634 typedef int (*Semaphore)() DART_UNUSED;
635 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry()));
636 }
693 } 637 }
694 638
695 639
696 ASSEMBLER_TEST_GENERATE(FailedSemaphore, assembler) { 640 ASSEMBLER_TEST_GENERATE(FailedSemaphore, assembler) {
697 if (TargetCPUFeatures::arm_version() == ARMv5TE) { 641 if (TargetCPUFeatures::arm_version() != ARMv5TE) {
698 __ mov(R0, Operand(41));
699 __ bx(LR);
700 } else {
701 __ mov(R0, Operand(40)); 642 __ mov(R0, Operand(40));
702 __ mov(R1, Operand(42)); 643 __ mov(R1, Operand(42));
703 __ Push(R0); 644 __ Push(R0);
704 __ ldrex(R0, SP); 645 __ ldrex(R0, SP);
705 __ clrex(); // Simulate a context switch. 646 __ clrex(); // Simulate a context switch.
706 __ strex(IP, R1, SP); // IP == 1, failure 647 __ strex(IP, R1, SP); // IP == 1, failure
707 __ Pop(R0); // 40 648 __ Pop(R0); // 40
708 __ add(R0, R0, Operand(IP)); 649 __ add(R0, R0, Operand(IP));
709 __ bx(LR);
710 } 650 }
651 __ bx(LR);
711 } 652 }
712 653
713 654
714 ASSEMBLER_TEST_RUN(FailedSemaphore, test) { 655 ASSEMBLER_TEST_RUN(FailedSemaphore, test) {
715 EXPECT(test != NULL); 656 EXPECT(test != NULL);
716 typedef int (*FailedSemaphore)() DART_UNUSED; 657 if (TargetCPUFeatures::arm_version() != ARMv5TE) {
717 EXPECT_EQ(41, EXECUTE_TEST_CODE_INT32(FailedSemaphore, test->entry())); 658 typedef int (*FailedSemaphore)() DART_UNUSED;
659 EXPECT_EQ(41, EXECUTE_TEST_CODE_INT32(FailedSemaphore, test->entry()));
660 }
718 } 661 }
719 662
720 663
721 ASSEMBLER_TEST_GENERATE(AddSub, assembler) { 664 ASSEMBLER_TEST_GENERATE(AddSub, assembler) {
722 __ mov(R1, Operand(40)); 665 __ mov(R1, Operand(40));
723 __ sub(R1, R1, Operand(2)); 666 __ sub(R1, R1, Operand(2));
724 __ add(R0, R1, Operand(4)); 667 __ add(R0, R1, Operand(4));
725 __ rsbs(R0, R0, Operand(100)); 668 __ rsbs(R0, R0, Operand(100));
726 __ rsc(R0, R0, Operand(100)); 669 __ rsc(R0, R0, Operand(100));
727 __ bx(LR); 670 __ bx(LR);
(...skipping 148 matching lines...) Expand 10 before | Expand all | Expand 10 after
876 ASSEMBLER_TEST_GENERATE(QuotientRemainder, assembler) { 819 ASSEMBLER_TEST_GENERATE(QuotientRemainder, assembler) {
877 if (TargetCPUFeatures::vfp_supported()) { 820 if (TargetCPUFeatures::vfp_supported()) {
878 __ vmovsr(S2, R0); 821 __ vmovsr(S2, R0);
879 __ vmovsr(S4, R2); 822 __ vmovsr(S4, R2);
880 __ vcvtdi(D1, S2); 823 __ vcvtdi(D1, S2);
881 __ vcvtdi(D2, S4); 824 __ vcvtdi(D2, S4);
882 __ vdivd(D0, D1, D2); 825 __ vdivd(D0, D1, D2);
883 __ vcvtid(S0, D0); 826 __ vcvtid(S0, D0);
884 __ vmovrs(R1, S0); // r1 = r0/r2 827 __ vmovrs(R1, S0); // r1 = r0/r2
885 __ mls(R0, R1, R2, R0); // r0 = r0 - r1*r2 828 __ mls(R0, R1, R2, R0); // r0 = r0 - r1*r2
886 } else {
887 __ LoadImmediate(R0, 0);
888 } 829 }
889 __ bx(LR); 830 __ bx(LR);
890 } 831 }
891 832
892 833
893 ASSEMBLER_TEST_RUN(QuotientRemainder, test) { 834 ASSEMBLER_TEST_RUN(QuotientRemainder, test) {
894 EXPECT(test != NULL); 835 EXPECT(test != NULL);
895 if (TargetCPUFeatures::vfp_supported()) { 836 if (TargetCPUFeatures::vfp_supported()) {
896 typedef int64_t (*QuotientRemainder) 837 typedef int64_t (*QuotientRemainder)
897 (int64_t dividend, int64_t divisor) DART_UNUSED; 838 (int64_t dividend, int64_t divisor) DART_UNUSED;
898 EXPECT_EQ(0x1000400000da8LL, 839 EXPECT_EQ(0x1000400000da8LL,
899 EXECUTE_TEST_CODE_INT64_LL(QuotientRemainder, test->entry(), 840 EXECUTE_TEST_CODE_INT64_LL(QuotientRemainder, test->entry(),
900 0x12345678, 0x1234)); 841 0x12345678, 0x1234));
901 } else {
902 typedef int (*QuotientRemainder)() DART_UNUSED;
903 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(QuotientRemainder, test->entry()));
904 } 842 }
905 } 843 }
906 844
907 845
908 ASSEMBLER_TEST_GENERATE(Multiply64To64, assembler) { 846 ASSEMBLER_TEST_GENERATE(Multiply64To64, assembler) {
909 #if defined(USING_SIMULATOR) 847 #if defined(USING_SIMULATOR)
910 const ARMVersion version = TargetCPUFeatures::arm_version(); 848 const ARMVersion version = TargetCPUFeatures::arm_version();
911 HostCPUFeatures::set_arm_version(ARMv7); 849 HostCPUFeatures::set_arm_version(ARMv7);
912 #endif 850 #endif
913 if (TargetCPUFeatures::arm_version() == ARMv7) { 851 if (TargetCPUFeatures::arm_version() == ARMv7) {
(...skipping 18 matching lines...) Expand all
932 ASSEMBLER_TEST_RUN(Multiply64To64, test) { 870 ASSEMBLER_TEST_RUN(Multiply64To64, test) {
933 EXPECT(test != NULL); 871 EXPECT(test != NULL);
934 typedef int64_t (*Multiply64To64) 872 typedef int64_t (*Multiply64To64)
935 (int64_t operand0, int64_t operand1) DART_UNUSED; 873 (int64_t operand0, int64_t operand1) DART_UNUSED;
936 EXPECT_EQ(6, 874 EXPECT_EQ(6,
937 EXECUTE_TEST_CODE_INT64_LL(Multiply64To64, test->entry(), -3, -2)); 875 EXECUTE_TEST_CODE_INT64_LL(Multiply64To64, test->entry(), -3, -2));
938 } 876 }
939 877
940 878
941 ASSEMBLER_TEST_GENERATE(Multiply32To64, assembler) { 879 ASSEMBLER_TEST_GENERATE(Multiply32To64, assembler) {
942 #if defined(USING_SIMULATOR) 880 __ smull(R0, R1, R0, R2);
943 const ARMVersion version = TargetCPUFeatures::arm_version();
944 HostCPUFeatures::set_arm_version(ARMv7);
945 #endif
946 if (TargetCPUFeatures::arm_version() == ARMv7) {
947 __ smull(R0, R1, R0, R2);
948 } else {
949 __ LoadImmediate(R0, 6);
950 __ LoadImmediate(R1, 0);
951 }
952 __ bx(LR); 881 __ bx(LR);
953 #if defined(USING_SIMULATOR)
954 HostCPUFeatures::set_arm_version(version);
955 #endif
956 } 882 }
957 883
958 884
959 ASSEMBLER_TEST_RUN(Multiply32To64, test) { 885 ASSEMBLER_TEST_RUN(Multiply32To64, test) {
960 EXPECT(test != NULL); 886 EXPECT(test != NULL);
961 typedef int64_t (*Multiply32To64) 887 typedef int64_t (*Multiply32To64)
962 (int64_t operand0, int64_t operand1) DART_UNUSED; 888 (int64_t operand0, int64_t operand1) DART_UNUSED;
963 EXPECT_EQ(6, 889 EXPECT_EQ(6,
964 EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2)); 890 EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2));
965 } 891 }
(...skipping 301 matching lines...) Expand 10 before | Expand all | Expand 10 after
1267 1193
1268 ASSEMBLER_TEST_RUN(Ldrh1, test) { 1194 ASSEMBLER_TEST_RUN(Ldrh1, test) {
1269 EXPECT(test != NULL); 1195 EXPECT(test != NULL);
1270 typedef int (*Tst)() DART_UNUSED; 1196 typedef int (*Tst)() DART_UNUSED;
1271 EXPECT_EQ(0xff, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1197 EXPECT_EQ(0xff, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1272 } 1198 }
1273 1199
1274 1200
1275 ASSEMBLER_TEST_GENERATE(Ldrd, assembler) { 1201 ASSEMBLER_TEST_GENERATE(Ldrd, assembler) {
1276 __ mov(IP, Operand(SP)); 1202 __ mov(IP, Operand(SP));
1277 __ strd(R2, Address(SP, (-kWordSize * 30), Address::PreIndex)); 1203 __ sub(SP, SP, Operand(kWordSize*30));
1278 __ strd(R0, Address(IP, (-kWordSize * 28))); 1204 __ strd(R2, SP, 0);
1279 __ ldrd(R2, Address(IP, (-kWordSize * 28))); 1205 __ strd(R0, IP, (-kWordSize*28));
1280 __ ldrd(R0, Address(SP, (kWordSize * 30), Address::PostIndex)); 1206 __ ldrd(R2, IP, (-kWordSize*28));
1207 __ ldrd(R0, SP, 0);
1208 __ add(SP, SP, Operand(kWordSize*30));
1281 __ sub(R0, R0, Operand(R2)); 1209 __ sub(R0, R0, Operand(R2));
1282 __ add(R1, R1, Operand(R3)); 1210 __ add(R1, R1, Operand(R3));
1283 __ bx(LR); 1211 __ bx(LR);
1284 } 1212 }
1285 1213
1286 1214
1287 ASSEMBLER_TEST_RUN(Ldrd, test) { 1215 ASSEMBLER_TEST_RUN(Ldrd, test) {
1288 EXPECT(test != NULL); 1216 EXPECT(test != NULL);
1289 typedef int64_t (*Tst)(int64_t r0r1, int64_t r2r3) DART_UNUSED; 1217 typedef int64_t (*Tst)(int64_t r0r1, int64_t r2r3) DART_UNUSED;
1290 EXPECT_EQ(0x0000444400002222LL, EXECUTE_TEST_CODE_INT64_LL( 1218 EXPECT_EQ(0x0000444400002222LL, EXECUTE_TEST_CODE_INT64_LL(
(...skipping 178 matching lines...) Expand 10 before | Expand all | Expand 10 after
1469 __ LoadDImmediate(D5, 2.0, R1); 1397 __ LoadDImmediate(D5, 2.0, R1);
1470 __ vcmpd(D2, D5); 1398 __ vcmpd(D2, D5);
1471 __ vmstat(); 1399 __ vmstat();
1472 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE 1400 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE
1473 1401
1474 // Check that 1.0 is back in D1 1402 // Check that 1.0 is back in D1
1475 __ LoadDImmediate(D5, 1.0, R1); 1403 __ LoadDImmediate(D5, 1.0, R1);
1476 __ vcmpd(D1, D5); 1404 __ vcmpd(D1, D5);
1477 __ vmstat(); 1405 __ vmstat();
1478 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE 1406 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE
1479 } else {
1480 __ LoadImmediate(R0, 42);
1481 } 1407 }
1482 __ bx(LR); 1408 __ bx(LR);
1483 } 1409 }
1484 1410
1485 1411
1486 ASSEMBLER_TEST_RUN(VstmdVldmd, test) { 1412 ASSEMBLER_TEST_RUN(VstmdVldmd, test) {
1487 EXPECT(test != NULL); 1413 EXPECT(test != NULL);
1488 typedef int (*Tst)() DART_UNUSED; 1414 if (TargetCPUFeatures::vfp_supported()) {
1489 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1415 typedef int (*Tst)() DART_UNUSED;
1416 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1417 }
1490 } 1418 }
1491 1419
1492 1420
1493 // Make sure we can store and reload the S registers using vstms and vldms 1421 // Make sure we can store and reload the S registers using vstms and vldms
1494 ASSEMBLER_TEST_GENERATE(VstmsVldms, assembler) { 1422 ASSEMBLER_TEST_GENERATE(VstmsVldms, assembler) {
1495 if (TargetCPUFeatures::vfp_supported()) { 1423 if (TargetCPUFeatures::vfp_supported()) {
1496 __ LoadSImmediate(S0, 0.0); 1424 __ LoadSImmediate(S0, 0.0);
1497 __ LoadSImmediate(S1, 1.0); 1425 __ LoadSImmediate(S1, 1.0);
1498 __ LoadSImmediate(S2, 2.0); 1426 __ LoadSImmediate(S2, 2.0);
1499 __ LoadSImmediate(S3, 3.0); 1427 __ LoadSImmediate(S3, 3.0);
(...skipping 25 matching lines...) Expand all
1525 __ LoadSImmediate(S5, 2.0); 1453 __ LoadSImmediate(S5, 2.0);
1526 __ vcmps(S2, S5); 1454 __ vcmps(S2, S5);
1527 __ vmstat(); 1455 __ vmstat();
1528 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE 1456 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE
1529 1457
1530 // Check that 1.0 is back in S1 1458 // Check that 1.0 is back in S1
1531 __ LoadSImmediate(S5, 1.0); 1459 __ LoadSImmediate(S5, 1.0);
1532 __ vcmps(S1, S5); 1460 __ vcmps(S1, S5);
1533 __ vmstat(); 1461 __ vmstat();
1534 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE 1462 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE
1535 } else {
1536 __ LoadImmediate(R0, 42);
1537 } 1463 }
1538 __ bx(LR); 1464 __ bx(LR);
1539 } 1465 }
1540 1466
1541 1467
1542 ASSEMBLER_TEST_RUN(VstmsVldms, test) { 1468 ASSEMBLER_TEST_RUN(VstmsVldms, test) {
1543 EXPECT(test != NULL); 1469 EXPECT(test != NULL);
1544 typedef int (*Tst)() DART_UNUSED; 1470 if (TargetCPUFeatures::vfp_supported()) {
1545 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1471 typedef int (*Tst)() DART_UNUSED;
1472 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1473 }
1546 } 1474 }
1547 1475
1548 1476
1549 // Make sure we can start somewhere other than D0 1477 // Make sure we can start somewhere other than D0
1550 ASSEMBLER_TEST_GENERATE(VstmdVldmd1, assembler) { 1478 ASSEMBLER_TEST_GENERATE(VstmdVldmd1, assembler) {
1551 if (TargetCPUFeatures::vfp_supported()) { 1479 if (TargetCPUFeatures::vfp_supported()) {
1552 __ LoadDImmediate(D1, 1.0, R0); 1480 __ LoadDImmediate(D1, 1.0, R0);
1553 __ LoadDImmediate(D2, 2.0, R0); 1481 __ LoadDImmediate(D2, 2.0, R0);
1554 __ LoadDImmediate(D3, 3.0, R0); 1482 __ LoadDImmediate(D3, 3.0, R0);
1555 __ LoadDImmediate(D4, 4.0, R0); 1483 __ LoadDImmediate(D4, 4.0, R0);
(...skipping 24 matching lines...) Expand all
1580 __ LoadDImmediate(D5, 2.0, R1); 1508 __ LoadDImmediate(D5, 2.0, R1);
1581 __ vcmpd(D2, D5); 1509 __ vcmpd(D2, D5);
1582 __ vmstat(); 1510 __ vmstat();
1583 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE 1511 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE
1584 1512
1585 // Check that 1.0 is back in D1 1513 // Check that 1.0 is back in D1
1586 __ LoadDImmediate(D5, 1.0, R1); 1514 __ LoadDImmediate(D5, 1.0, R1);
1587 __ vcmpd(D1, D5); 1515 __ vcmpd(D1, D5);
1588 __ vmstat(); 1516 __ vmstat();
1589 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE 1517 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE
1590 } else {
1591 __ LoadImmediate(R0, 42);
1592 } 1518 }
1593 __ bx(LR); 1519 __ bx(LR);
1594 } 1520 }
1595 1521
1596 1522
1597 ASSEMBLER_TEST_RUN(VstmdVldmd1, test) { 1523 ASSEMBLER_TEST_RUN(VstmdVldmd1, test) {
1598 EXPECT(test != NULL); 1524 EXPECT(test != NULL);
1599 typedef int (*Tst)() DART_UNUSED; 1525 if (TargetCPUFeatures::vfp_supported()) {
1600 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1526 typedef int (*Tst)() DART_UNUSED;
1527 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1528 }
1601 } 1529 }
1602 1530
1603 1531
1604 // Make sure we can start somewhere other than S0 1532 // Make sure we can start somewhere other than S0
1605 ASSEMBLER_TEST_GENERATE(VstmsVldms1, assembler) { 1533 ASSEMBLER_TEST_GENERATE(VstmsVldms1, assembler) {
1606 if (TargetCPUFeatures::vfp_supported()) { 1534 if (TargetCPUFeatures::vfp_supported()) {
1607 __ LoadSImmediate(S1, 1.0); 1535 __ LoadSImmediate(S1, 1.0);
1608 __ LoadSImmediate(S2, 2.0); 1536 __ LoadSImmediate(S2, 2.0);
1609 __ LoadSImmediate(S3, 3.0); 1537 __ LoadSImmediate(S3, 3.0);
1610 __ LoadSImmediate(S4, 4.0); 1538 __ LoadSImmediate(S4, 4.0);
(...skipping 23 matching lines...) Expand all
1634 __ LoadSImmediate(S5, 2.0); 1562 __ LoadSImmediate(S5, 2.0);
1635 __ vcmps(S2, S5); 1563 __ vcmps(S2, S5);
1636 __ vmstat(); 1564 __ vmstat();
1637 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE 1565 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE
1638 1566
1639 // Check that 1.0 is back in S1 1567 // Check that 1.0 is back in S1
1640 __ LoadSImmediate(S5, 1.0); 1568 __ LoadSImmediate(S5, 1.0);
1641 __ vcmps(S1, S5); 1569 __ vcmps(S1, S5);
1642 __ vmstat(); 1570 __ vmstat();
1643 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE 1571 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE
1644 } else {
1645 __ LoadImmediate(R0, 42);
1646 } 1572 }
1647 __ bx(LR); 1573 __ bx(LR);
1648 } 1574 }
1649 1575
1650 1576
1651 ASSEMBLER_TEST_RUN(VstmsVldms1, test) { 1577 ASSEMBLER_TEST_RUN(VstmsVldms1, test) {
1652 EXPECT(test != NULL); 1578 EXPECT(test != NULL);
1653 typedef int (*Tst)() DART_UNUSED; 1579 if (TargetCPUFeatures::vfp_supported()) {
1654 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1580 typedef int (*Tst)() DART_UNUSED;
1581 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1582 }
1655 } 1583 }
1656 1584
1657 1585
1658 // Make sure we can store the D registers using vstmd and 1586 // Make sure we can store the D registers using vstmd and
1659 // load them into a different set using vldmd 1587 // load them into a different set using vldmd
1660 ASSEMBLER_TEST_GENERATE(VstmdVldmd_off, assembler) { 1588 ASSEMBLER_TEST_GENERATE(VstmdVldmd_off, assembler) {
1661 if (TargetCPUFeatures::vfp_supported()) { 1589 if (TargetCPUFeatures::vfp_supported()) {
1662 // Save used callee-saved FPU registers. 1590 // Save used callee-saved FPU registers.
1663 __ vstmd(DB_W, SP, D8, 3); 1591 __ vstmd(DB_W, SP, D8, 3);
1664 __ LoadDImmediate(D0, 0.0, R0); 1592 __ LoadDImmediate(D0, 0.0, R0);
(...skipping 34 matching lines...) Expand 10 before | Expand all | Expand 10 after
1699 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE 1627 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE
1700 1628
1701 // Check that 0.0 is in D5 1629 // Check that 0.0 is in D5
1702 __ LoadDImmediate(D10, 0.0, R1); 1630 __ LoadDImmediate(D10, 0.0, R1);
1703 __ vcmpd(D5, D10); 1631 __ vcmpd(D5, D10);
1704 __ vmstat(); 1632 __ vmstat();
1705 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE 1633 __ mov(R0, Operand(0), NE); // Put failure into R0 if NE
1706 1634
1707 // Restore used callee-saved FPU registers. 1635 // Restore used callee-saved FPU registers.
1708 __ vldmd(IA_W, SP, D8, 3); 1636 __ vldmd(IA_W, SP, D8, 3);
1709 } else {
1710 __ LoadImmediate(R0, 42);
1711 } 1637 }
1712 __ bx(LR); 1638 __ bx(LR);
1713 } 1639 }
1714 1640
1715 1641
1716 ASSEMBLER_TEST_RUN(VstmdVldmd_off, test) { 1642 ASSEMBLER_TEST_RUN(VstmdVldmd_off, test) {
1717 EXPECT(test != NULL); 1643 EXPECT(test != NULL);
1718 typedef int (*Tst)() DART_UNUSED; 1644 if (TargetCPUFeatures::vfp_supported()) {
1719 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1645 typedef int (*Tst)() DART_UNUSED;
1646 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1647 }
1720 } 1648 }
1721 1649
1722 1650
1723 // Make sure we can start somewhere other than S0 1651 // Make sure we can start somewhere other than S0
1724 ASSEMBLER_TEST_GENERATE(VstmsVldms_off, assembler) { 1652 ASSEMBLER_TEST_GENERATE(VstmsVldms_off, assembler) {
1725 if (TargetCPUFeatures::vfp_supported()) { 1653 if (TargetCPUFeatures::vfp_supported()) {
1726 __ LoadSImmediate(S0, 0.0); 1654 __ LoadSImmediate(S0, 0.0);
1727 __ LoadSImmediate(S1, 1.0); 1655 __ LoadSImmediate(S1, 1.0);
1728 __ LoadSImmediate(S2, 2.0); 1656 __ LoadSImmediate(S2, 2.0);
1729 __ LoadSImmediate(S3, 3.0); 1657 __ LoadSImmediate(S3, 3.0);
(...skipping 27 matching lines...) Expand all
1757 __ LoadSImmediate(S10, 1.0); 1685 __ LoadSImmediate(S10, 1.0);
1758 __ vcmps(S6, S10); 1686 __ vcmps(S6, S10);
1759 __ vmstat(); 1687 __ vmstat();
1760 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE 1688 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE
1761 1689
1762 // Check that 0.0 is back in S5 1690 // Check that 0.0 is back in S5
1763 __ LoadSImmediate(S10, 0.0); 1691 __ LoadSImmediate(S10, 0.0);
1764 __ vcmps(S5, S10); 1692 __ vcmps(S5, S10);
1765 __ vmstat(); 1693 __ vmstat();
1766 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE 1694 __ mov(R0, Operand(0), NE); // Put failure value into R0 if NE
1767 } else {
1768 __ LoadImmediate(R0, 42);
1769 } 1695 }
1770 __ bx(LR); 1696 __ bx(LR);
1771 } 1697 }
1772 1698
1773 1699
1774 ASSEMBLER_TEST_RUN(VstmsVldms_off, test) { 1700 ASSEMBLER_TEST_RUN(VstmsVldms_off, test) {
1775 EXPECT(test != NULL); 1701 EXPECT(test != NULL);
1776 typedef int (*Tst)() DART_UNUSED; 1702 if (TargetCPUFeatures::vfp_supported()) {
1777 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1703 typedef int (*Tst)() DART_UNUSED;
1704 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1705 }
1778 } 1706 }
1779 1707
1780 1708
1781 ASSEMBLER_TEST_GENERATE(Udiv, assembler) { 1709 ASSEMBLER_TEST_GENERATE(Udiv, assembler) {
1782 if (TargetCPUFeatures::integer_division_supported()) { 1710 if (TargetCPUFeatures::integer_division_supported()) {
1783 __ mov(R0, Operand(27)); 1711 __ mov(R0, Operand(27));
1784 __ mov(R1, Operand(9)); 1712 __ mov(R1, Operand(9));
1785 __ udiv(R2, R0, R1); 1713 __ udiv(R2, R0, R1);
1786 __ mov(R0, Operand(R2)); 1714 __ mov(R0, Operand(R2));
1787 } else {
1788 __ mov(R0, Operand(3));
1789 } 1715 }
1790 __ bx(LR); 1716 __ bx(LR);
1791 } 1717 }
1792 1718
1793 1719
1794 ASSEMBLER_TEST_RUN(Udiv, test) { 1720 ASSEMBLER_TEST_RUN(Udiv, test) {
1795 EXPECT(test != NULL); 1721 EXPECT(test != NULL);
1796 typedef int (*Tst)() DART_UNUSED; 1722 if (TargetCPUFeatures::integer_division_supported()) {
1797 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1723 typedef int (*Tst)() DART_UNUSED;
1724 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1725 }
1798 } 1726 }
1799 1727
1800 1728
1801 ASSEMBLER_TEST_GENERATE(Sdiv, assembler) { 1729 ASSEMBLER_TEST_GENERATE(Sdiv, assembler) {
1802 if (TargetCPUFeatures::integer_division_supported()) { 1730 if (TargetCPUFeatures::integer_division_supported()) {
1803 __ mov(R0, Operand(27)); 1731 __ mov(R0, Operand(27));
1804 __ LoadImmediate(R1, -9); 1732 __ LoadImmediate(R1, -9);
1805 __ sdiv(R2, R0, R1); 1733 __ sdiv(R2, R0, R1);
1806 __ mov(R0, Operand(R2)); 1734 __ mov(R0, Operand(R2));
1807 } else {
1808 __ LoadImmediate(R0, -3);
1809 } 1735 }
1810 __ bx(LR); 1736 __ bx(LR);
1811 } 1737 }
1812 1738
1813 1739
1814 ASSEMBLER_TEST_RUN(Sdiv, test) { 1740 ASSEMBLER_TEST_RUN(Sdiv, test) {
1815 EXPECT(test != NULL); 1741 EXPECT(test != NULL);
1816 typedef int (*Tst)() DART_UNUSED; 1742 if (TargetCPUFeatures::integer_division_supported()) {
1817 EXPECT_EQ(-3, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1743 typedef int (*Tst)() DART_UNUSED;
1744 EXPECT_EQ(-3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1745 }
1818 } 1746 }
1819 1747
1820 1748
1821 ASSEMBLER_TEST_GENERATE(Udiv_zero, assembler) { 1749 ASSEMBLER_TEST_GENERATE(Udiv_zero, assembler) {
1822 if (TargetCPUFeatures::integer_division_supported()) { 1750 if (TargetCPUFeatures::integer_division_supported()) {
1823 __ mov(R0, Operand(27)); 1751 __ mov(R0, Operand(27));
1824 __ mov(R1, Operand(0)); 1752 __ mov(R1, Operand(0));
1825 __ udiv(R2, R0, R1); 1753 __ udiv(R2, R0, R1);
1826 __ mov(R0, Operand(R2)); 1754 __ mov(R0, Operand(R2));
1827 } else {
1828 __ LoadImmediate(R0, 0);
1829 } 1755 }
1830 __ bx(LR); 1756 __ bx(LR);
1831 } 1757 }
1832 1758
1833 1759
1834 ASSEMBLER_TEST_RUN(Udiv_zero, test) { 1760 ASSEMBLER_TEST_RUN(Udiv_zero, test) {
1835 EXPECT(test != NULL); 1761 EXPECT(test != NULL);
1836 typedef int (*Tst)() DART_UNUSED; 1762 if (TargetCPUFeatures::integer_division_supported()) {
1837 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1763 typedef int (*Tst)() DART_UNUSED;
1764 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1765 }
1838 } 1766 }
1839 1767
1840 1768
1841 ASSEMBLER_TEST_GENERATE(Sdiv_zero, assembler) { 1769 ASSEMBLER_TEST_GENERATE(Sdiv_zero, assembler) {
1842 if (TargetCPUFeatures::integer_division_supported()) { 1770 if (TargetCPUFeatures::integer_division_supported()) {
1843 __ mov(R0, Operand(27)); 1771 __ mov(R0, Operand(27));
1844 __ mov(R1, Operand(0)); 1772 __ mov(R1, Operand(0));
1845 __ sdiv(R2, R0, R1); 1773 __ sdiv(R2, R0, R1);
1846 __ mov(R0, Operand(R2)); 1774 __ mov(R0, Operand(R2));
1847 } else {
1848 __ LoadImmediate(R0, 0);
1849 } 1775 }
1850 __ bx(LR); 1776 __ bx(LR);
1851 } 1777 }
1852 1778
1853 1779
1854 ASSEMBLER_TEST_RUN(Sdiv_zero, test) { 1780 ASSEMBLER_TEST_RUN(Sdiv_zero, test) {
1855 EXPECT(test != NULL); 1781 EXPECT(test != NULL);
1856 typedef int (*Tst)() DART_UNUSED; 1782 if (TargetCPUFeatures::integer_division_supported()) {
1857 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1783 typedef int (*Tst)() DART_UNUSED;
1784 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1785 }
1858 } 1786 }
1859 1787
1860 1788
1861 ASSEMBLER_TEST_GENERATE(Udiv_corner, assembler) { 1789 ASSEMBLER_TEST_GENERATE(Udiv_corner, assembler) {
1862 if (TargetCPUFeatures::integer_division_supported()) { 1790 if (TargetCPUFeatures::integer_division_supported()) {
1863 __ LoadImmediate(R0, 0x80000000); 1791 __ LoadImmediate(R0, 0x80000000);
1864 __ LoadImmediate(R1, 0xffffffff); 1792 __ LoadImmediate(R1, 0xffffffff);
1865 __ udiv(R2, R0, R1); 1793 __ udiv(R2, R0, R1);
1866 __ mov(R0, Operand(R2)); 1794 __ mov(R0, Operand(R2));
1867 } else {
1868 __ LoadImmediate(R0, 0);
1869 } 1795 }
1870 __ bx(LR); 1796 __ bx(LR);
1871 } 1797 }
1872 1798
1873 1799
1874 ASSEMBLER_TEST_RUN(Udiv_corner, test) { 1800 ASSEMBLER_TEST_RUN(Udiv_corner, test) {
1875 EXPECT(test != NULL); 1801 EXPECT(test != NULL);
1876 typedef int (*Tst)() DART_UNUSED; 1802 if (TargetCPUFeatures::integer_division_supported()) {
1877 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1803 typedef int (*Tst)() DART_UNUSED;
1804 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1805 }
1878 } 1806 }
1879 1807
1880 1808
1881 ASSEMBLER_TEST_GENERATE(Sdiv_corner, assembler) { 1809 ASSEMBLER_TEST_GENERATE(Sdiv_corner, assembler) {
1882 if (TargetCPUFeatures::integer_division_supported()) { 1810 if (TargetCPUFeatures::integer_division_supported()) {
1883 __ LoadImmediate(R0, 0x80000000); 1811 __ LoadImmediate(R0, 0x80000000);
1884 __ LoadImmediate(R1, 0xffffffff); 1812 __ LoadImmediate(R1, 0xffffffff);
1885 __ sdiv(R2, R0, R1); 1813 __ sdiv(R2, R0, R1);
1886 __ mov(R0, Operand(R2)); 1814 __ mov(R0, Operand(R2));
1887 } else {
1888 __ LoadImmediate(R0, 0x80000000);
1889 } 1815 }
1890 __ bx(LR); 1816 __ bx(LR);
1891 } 1817 }
1892 1818
1893 1819
1894 ASSEMBLER_TEST_RUN(Sdiv_corner, test) { 1820 ASSEMBLER_TEST_RUN(Sdiv_corner, test) {
1895 EXPECT(test != NULL); 1821 EXPECT(test != NULL);
1896 typedef int (*Tst)() DART_UNUSED; 1822 if (TargetCPUFeatures::integer_division_supported()) {
1897 EXPECT_EQ(static_cast<int32_t>(0x80000000), 1823 typedef int (*Tst)() DART_UNUSED;
1898 EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1824 EXPECT_EQ(static_cast<int32_t>(0x80000000),
1825 EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1826 }
1899 } 1827 }
1900 1828
1901 1829
1902 ASSEMBLER_TEST_GENERATE(IntDiv_supported, assembler) { 1830 ASSEMBLER_TEST_GENERATE(IntDiv_supported, assembler) {
1903 #if defined(USING_SIMULATOR) 1831 #if defined(USING_SIMULATOR)
1904 bool orig = TargetCPUFeatures::integer_division_supported(); 1832 bool orig = TargetCPUFeatures::integer_division_supported();
1905 HostCPUFeatures::set_integer_division_supported(true); 1833 HostCPUFeatures::set_integer_division_supported(true);
1906 __ mov(R0, Operand(27)); 1834 __ mov(R0, Operand(27));
1907 __ mov(R1, Operand(9)); 1835 __ mov(R1, Operand(9));
1908 __ IntegerDivide(R0, R0, R1, D0, D1); 1836 __ IntegerDivide(R0, R0, R1, D0, D1);
1909 HostCPUFeatures::set_integer_division_supported(orig); 1837 HostCPUFeatures::set_integer_division_supported(orig);
1910 __ bx(LR); 1838 __ bx(LR);
1911 #else 1839 #else
1912 __ mov(R0, Operand(27)); 1840 if (TargetCPUFeatures::can_divide()) {
1913 __ mov(R1, Operand(9)); 1841 __ mov(R0, Operand(27));
1914 __ IntegerDivide(R0, R0, R1, D0, D1); 1842 __ mov(R1, Operand(9));
1843 __ IntegerDivide(R0, R0, R1, D0, D1);
1844 }
1915 __ bx(LR); 1845 __ bx(LR);
1916 #endif 1846 #endif
1917 } 1847 }
1918 1848
1919 1849
1920 ASSEMBLER_TEST_RUN(IntDiv_supported, test) { 1850 ASSEMBLER_TEST_RUN(IntDiv_supported, test) {
1921 EXPECT(test != NULL); 1851 EXPECT(test != NULL);
1922 typedef int (*Tst)() DART_UNUSED; 1852 if (TargetCPUFeatures::can_divide()) {
1923 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1853 typedef int (*Tst)() DART_UNUSED;
1854 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1855 }
1924 } 1856 }
1925 1857
1926 1858
1927 ASSEMBLER_TEST_GENERATE(IntDiv_unsupported, assembler) { 1859 ASSEMBLER_TEST_GENERATE(IntDiv_unsupported, assembler) {
1928 #if defined(USING_SIMULATOR) 1860 #if defined(USING_SIMULATOR)
1929 bool orig = TargetCPUFeatures::integer_division_supported(); 1861 bool orig = TargetCPUFeatures::integer_division_supported();
1930 HostCPUFeatures::set_integer_division_supported(false); 1862 HostCPUFeatures::set_integer_division_supported(false);
1931 __ mov(R0, Operand(27)); 1863 __ mov(R0, Operand(27));
1932 __ mov(R1, Operand(9)); 1864 __ mov(R1, Operand(9));
1933 __ IntegerDivide(R0, R0, R1, D0, D1); 1865 __ IntegerDivide(R0, R0, R1, D0, D1);
1934 HostCPUFeatures::set_integer_division_supported(orig); 1866 HostCPUFeatures::set_integer_division_supported(orig);
1935 __ bx(LR); 1867 __ bx(LR);
1936 #else 1868 #else
1937 __ mov(R0, Operand(27)); 1869 if (TargetCPUFeatures::can_divide()) {
1938 __ mov(R1, Operand(9)); 1870 __ mov(R0, Operand(27));
1939 __ IntegerDivide(R0, R0, R1, D0, D1); 1871 __ mov(R1, Operand(9));
1872 __ IntegerDivide(R0, R0, R1, D0, D1);
1873 }
1940 __ bx(LR); 1874 __ bx(LR);
1941 #endif 1875 #endif
1942 } 1876 }
1943 1877
1944 1878
1945 ASSEMBLER_TEST_RUN(IntDiv_unsupported, test) { 1879 ASSEMBLER_TEST_RUN(IntDiv_unsupported, test) {
1946 EXPECT(test != NULL); 1880 EXPECT(test != NULL);
1947 typedef int (*Tst)() DART_UNUSED; 1881 if (TargetCPUFeatures::can_divide()) {
1948 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1882 typedef int (*Tst)() DART_UNUSED;
1883 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1884 }
1949 } 1885 }
1950 1886
1951 1887
1952 ASSEMBLER_TEST_GENERATE(Muls, assembler) { 1888 ASSEMBLER_TEST_GENERATE(Muls, assembler) {
1953 __ mov(R0, Operand(3)); 1889 __ mov(R0, Operand(3));
1954 __ LoadImmediate(R1, -9); 1890 __ LoadImmediate(R1, -9);
1955 __ muls(R2, R0, R1); 1891 __ muls(R2, R0, R1);
1956 __ mov(R0, Operand(42), MI); 1892 __ mov(R0, Operand(42), MI);
1957 __ bx(LR); 1893 __ bx(LR);
1958 } 1894 }
(...skipping 28 matching lines...) Expand all
1987 __ vaddqi(kByte, Q2, Q0, Q1); 1923 __ vaddqi(kByte, Q2, Q0, Q1);
1988 1924
1989 __ vmovrs(R0, S8); 1925 __ vmovrs(R0, S8);
1990 __ vmovrs(R1, S9); 1926 __ vmovrs(R1, S9);
1991 __ vmovrs(R2, S10); 1927 __ vmovrs(R2, S10);
1992 __ vmovrs(R3, S11); 1928 __ vmovrs(R3, S11);
1993 1929
1994 __ add(R0, R0, Operand(R1)); 1930 __ add(R0, R0, Operand(R1));
1995 __ add(R0, R0, Operand(R2)); 1931 __ add(R0, R0, Operand(R2));
1996 __ add(R0, R0, Operand(R3)); 1932 __ add(R0, R0, Operand(R3));
1997 __ bx(LR);
1998 } else {
1999 __ LoadImmediate(R0, 36);
2000 __ bx(LR);
2001 } 1933 }
1934 __ bx(LR);
2002 } 1935 }
2003 1936
2004 1937
2005 ASSEMBLER_TEST_RUN(Vaddqi8, test) { 1938 ASSEMBLER_TEST_RUN(Vaddqi8, test) {
2006 EXPECT(test != NULL); 1939 EXPECT(test != NULL);
2007 typedef int (*Tst)() DART_UNUSED; 1940 if (TargetCPUFeatures::neon_supported()) {
2008 EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1941 typedef int (*Tst)() DART_UNUSED;
1942 EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1943 }
2009 } 1944 }
2010 1945
2011 1946
2012 ASSEMBLER_TEST_GENERATE(Vaddqi16, assembler) { 1947 ASSEMBLER_TEST_GENERATE(Vaddqi16, assembler) {
2013 if (TargetCPUFeatures::neon_supported()) { 1948 if (TargetCPUFeatures::neon_supported()) {
2014 __ mov(R0, Operand(1)); 1949 __ mov(R0, Operand(1));
2015 __ vmovsr(S0, R0); 1950 __ vmovsr(S0, R0);
2016 __ mov(R0, Operand(2)); 1951 __ mov(R0, Operand(2));
2017 __ vmovsr(S1, R0); 1952 __ vmovsr(S1, R0);
2018 __ mov(R0, Operand(3)); 1953 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
2031 __ vaddqi(kHalfword, Q2, Q0, Q1); 1966 __ vaddqi(kHalfword, Q2, Q0, Q1);
2032 1967
2033 __ vmovrs(R0, S8); 1968 __ vmovrs(R0, S8);
2034 __ vmovrs(R1, S9); 1969 __ vmovrs(R1, S9);
2035 __ vmovrs(R2, S10); 1970 __ vmovrs(R2, S10);
2036 __ vmovrs(R3, S11); 1971 __ vmovrs(R3, S11);
2037 1972
2038 __ add(R0, R0, Operand(R1)); 1973 __ add(R0, R0, Operand(R1));
2039 __ add(R0, R0, Operand(R2)); 1974 __ add(R0, R0, Operand(R2));
2040 __ add(R0, R0, Operand(R3)); 1975 __ add(R0, R0, Operand(R3));
2041 __ bx(LR);
2042 } else {
2043 __ LoadImmediate(R0, 36);
2044 __ bx(LR);
2045 } 1976 }
1977 __ bx(LR);
2046 } 1978 }
2047 1979
2048 1980
2049 ASSEMBLER_TEST_RUN(Vaddqi16, test) { 1981 ASSEMBLER_TEST_RUN(Vaddqi16, test) {
2050 EXPECT(test != NULL); 1982 EXPECT(test != NULL);
2051 typedef int (*Tst)() DART_UNUSED; 1983 if (TargetCPUFeatures::neon_supported()) {
2052 EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 1984 typedef int (*Tst)() DART_UNUSED;
1985 EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
1986 }
2053 } 1987 }
2054 1988
2055 1989
2056 ASSEMBLER_TEST_GENERATE(Vaddqi32, assembler) { 1990 ASSEMBLER_TEST_GENERATE(Vaddqi32, assembler) {
2057 if (TargetCPUFeatures::neon_supported()) { 1991 if (TargetCPUFeatures::neon_supported()) {
2058 __ mov(R0, Operand(1)); 1992 __ mov(R0, Operand(1));
2059 __ vmovsr(S0, R0); 1993 __ vmovsr(S0, R0);
2060 __ mov(R0, Operand(2)); 1994 __ mov(R0, Operand(2));
2061 __ vmovsr(S1, R0); 1995 __ vmovsr(S1, R0);
2062 __ mov(R0, Operand(3)); 1996 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
2075 __ vaddqi(kWord, Q2, Q0, Q1); 2009 __ vaddqi(kWord, Q2, Q0, Q1);
2076 2010
2077 __ vmovrs(R0, S8); 2011 __ vmovrs(R0, S8);
2078 __ vmovrs(R1, S9); 2012 __ vmovrs(R1, S9);
2079 __ vmovrs(R2, S10); 2013 __ vmovrs(R2, S10);
2080 __ vmovrs(R3, S11); 2014 __ vmovrs(R3, S11);
2081 2015
2082 __ add(R0, R0, Operand(R1)); 2016 __ add(R0, R0, Operand(R1));
2083 __ add(R0, R0, Operand(R2)); 2017 __ add(R0, R0, Operand(R2));
2084 __ add(R0, R0, Operand(R3)); 2018 __ add(R0, R0, Operand(R3));
2085 __ bx(LR);
2086 } else {
2087 __ LoadImmediate(R0, 36);
2088 __ bx(LR);
2089 } 2019 }
2020 __ bx(LR);
2090 } 2021 }
2091 2022
2092 2023
2093 ASSEMBLER_TEST_RUN(Vaddqi32, test) { 2024 ASSEMBLER_TEST_RUN(Vaddqi32, test) {
2094 EXPECT(test != NULL); 2025 EXPECT(test != NULL);
2095 typedef int (*Tst)() DART_UNUSED; 2026 if (TargetCPUFeatures::neon_supported()) {
2096 EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2027 typedef int (*Tst)() DART_UNUSED;
2028 EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2029 }
2097 } 2030 }
2098 2031
2099 2032
2100 ASSEMBLER_TEST_GENERATE(Vaddqi64, assembler) { 2033 ASSEMBLER_TEST_GENERATE(Vaddqi64, assembler) {
2101 if (TargetCPUFeatures::neon_supported()) { 2034 if (TargetCPUFeatures::neon_supported()) {
2102 __ mov(R0, Operand(1)); 2035 __ mov(R0, Operand(1));
2103 __ vmovsr(S0, R0); 2036 __ vmovsr(S0, R0);
2104 __ mov(R0, Operand(2)); 2037 __ mov(R0, Operand(2));
2105 __ vmovsr(S2, R0); 2038 __ vmovsr(S2, R0);
2106 __ mov(R0, Operand(3)); 2039 __ mov(R0, Operand(3));
2107 __ vmovsr(S4, R0); 2040 __ vmovsr(S4, R0);
2108 __ mov(R0, Operand(4)); 2041 __ mov(R0, Operand(4));
2109 __ vmovsr(S6, R0); 2042 __ vmovsr(S6, R0);
2110 2043
2111 __ vaddqi(kWordPair, Q2, Q0, Q1); 2044 __ vaddqi(kWordPair, Q2, Q0, Q1);
2112 2045
2113 __ vmovrs(R0, S8); 2046 __ vmovrs(R0, S8);
2114 __ vmovrs(R2, S10); 2047 __ vmovrs(R2, S10);
2115 2048
2116 __ add(R0, R0, Operand(R2)); 2049 __ add(R0, R0, Operand(R2));
2117 __ bx(LR);
2118 } else {
2119 __ LoadImmediate(R0, 10);
2120 __ bx(LR);
2121 } 2050 }
2051 __ bx(LR);
2122 } 2052 }
2123 2053
2124 2054
2125 ASSEMBLER_TEST_RUN(Vaddqi64, test) { 2055 ASSEMBLER_TEST_RUN(Vaddqi64, test) {
2126 EXPECT(test != NULL); 2056 EXPECT(test != NULL);
2127 typedef int (*Tst)() DART_UNUSED; 2057 if (TargetCPUFeatures::neon_supported()) {
2128 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2058 typedef int (*Tst)() DART_UNUSED;
2059 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2060 }
2129 } 2061 }
2130 2062
2131 2063
2132 ASSEMBLER_TEST_GENERATE(Vshlqu64, assembler) { 2064 ASSEMBLER_TEST_GENERATE(Vshlqu64, assembler) {
2133 if (TargetCPUFeatures::neon_supported()) { 2065 if (TargetCPUFeatures::neon_supported()) {
2134 Label fail; 2066 Label fail;
2135 __ LoadImmediate(R1, 21); 2067 __ LoadImmediate(R1, 21);
2136 __ LoadImmediate(R0, 1); 2068 __ LoadImmediate(R0, 1);
2137 __ vmovsr(S0, R1); 2069 __ vmovsr(S0, R1);
2138 __ vmovsr(S2, R1); 2070 __ vmovsr(S2, R1);
2139 __ vmovsr(S4, R0); 2071 __ vmovsr(S4, R0);
2140 __ vmovsr(S6, R0); 2072 __ vmovsr(S6, R0);
2141 2073
2142 __ vshlqu(kWordPair, Q2, Q0, Q1); 2074 __ vshlqu(kWordPair, Q2, Q0, Q1);
2143 2075
2144 __ vmovrs(R0, S8); 2076 __ vmovrs(R0, S8);
2145 __ vmovrs(R1, S10); 2077 __ vmovrs(R1, S10);
2146 __ CompareImmediate(R0, 42); 2078 __ CompareImmediate(R0, 42);
2147 __ LoadImmediate(R0, 0); 2079 __ LoadImmediate(R0, 0);
2148 __ b(&fail, NE); 2080 __ b(&fail, NE);
2149 __ CompareImmediate(R1, 42); 2081 __ CompareImmediate(R1, 42);
2150 __ LoadImmediate(R0, 0); 2082 __ LoadImmediate(R0, 0);
2151 __ b(&fail, NE); 2083 __ b(&fail, NE);
2152 2084
2153 __ LoadImmediate(R0, 1); 2085 __ LoadImmediate(R0, 1);
2154 __ Bind(&fail); 2086 __ Bind(&fail);
2155 __ bx(LR);
2156 } else {
2157 __ LoadImmediate(R0, 1);
2158 __ bx(LR);
2159 } 2087 }
2088 __ bx(LR);
2160 } 2089 }
2161 2090
2162 2091
2163 ASSEMBLER_TEST_RUN(Vshlqu64, test) { 2092 ASSEMBLER_TEST_RUN(Vshlqu64, test) {
2164 EXPECT(test != NULL); 2093 EXPECT(test != NULL);
2165 typedef int (*Tst)() DART_UNUSED; 2094 if (TargetCPUFeatures::neon_supported()) {
2166 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2095 typedef int (*Tst)() DART_UNUSED;
2096 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2097 }
2167 } 2098 }
2168 2099
2169 2100
2170 ASSEMBLER_TEST_GENERATE(Vshlqi64, assembler) { 2101 ASSEMBLER_TEST_GENERATE(Vshlqi64, assembler) {
2171 if (TargetCPUFeatures::neon_supported()) { 2102 if (TargetCPUFeatures::neon_supported()) {
2172 Label fail; 2103 Label fail;
2173 __ LoadImmediate(R1, -84); 2104 __ LoadImmediate(R1, -84);
2174 __ LoadImmediate(R0, -1); 2105 __ LoadImmediate(R0, -1);
2175 __ vmovdrr(D0, R1, R0); 2106 __ vmovdrr(D0, R1, R0);
2176 __ vmovdrr(D1, R1, R0); 2107 __ vmovdrr(D1, R1, R0);
2177 __ vmovsr(S4, R0); 2108 __ vmovsr(S4, R0);
2178 __ vmovsr(S6, R0); 2109 __ vmovsr(S6, R0);
2179 2110
2180 __ vshlqi(kWordPair, Q2, Q0, Q1); 2111 __ vshlqi(kWordPair, Q2, Q0, Q1);
2181 2112
2182 __ vmovrs(R0, S8); 2113 __ vmovrs(R0, S8);
2183 __ vmovrs(R1, S10); 2114 __ vmovrs(R1, S10);
2184 __ CompareImmediate(R0, -42); 2115 __ CompareImmediate(R0, -42);
2185 __ LoadImmediate(R0, 0); 2116 __ LoadImmediate(R0, 0);
2186 __ b(&fail, NE); 2117 __ b(&fail, NE);
2187 __ CompareImmediate(R1, -42); 2118 __ CompareImmediate(R1, -42);
2188 __ LoadImmediate(R0, 0); 2119 __ LoadImmediate(R0, 0);
2189 __ b(&fail, NE); 2120 __ b(&fail, NE);
2190 2121
2191 __ LoadImmediate(R0, 1); 2122 __ LoadImmediate(R0, 1);
2192 __ Bind(&fail); 2123 __ Bind(&fail);
2193 __ bx(LR);
2194 } else {
2195 __ LoadImmediate(R0, 1);
2196 __ bx(LR);
2197 } 2124 }
2125 __ bx(LR);
2198 } 2126 }
2199 2127
2200 2128
2201 ASSEMBLER_TEST_RUN(Vshlqi64, test) { 2129 ASSEMBLER_TEST_RUN(Vshlqi64, test) {
2202 EXPECT(test != NULL); 2130 EXPECT(test != NULL);
2203 typedef int (*Tst)() DART_UNUSED; 2131 if (TargetCPUFeatures::neon_supported()) {
2204 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2132 typedef int (*Tst)() DART_UNUSED;
2133 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2134 }
2205 } 2135 }
2206 2136
2207 2137
2208 ASSEMBLER_TEST_GENERATE(Mint_shl_ok, assembler) { 2138 ASSEMBLER_TEST_GENERATE(Mint_shl_ok, assembler) {
2209 if (TargetCPUFeatures::neon_supported()) { 2139 if (TargetCPUFeatures::neon_supported()) {
2210 const QRegister value = Q0; 2140 const QRegister value = Q0;
2211 const QRegister temp = Q1; 2141 const QRegister temp = Q1;
2212 const QRegister out = Q2; 2142 const QRegister out = Q2;
2213 const Register shift = R1; 2143 const Register shift = R1;
2214 const DRegister dtemp0 = EvenDRegisterOf(temp); 2144 const DRegister dtemp0 = EvenDRegisterOf(temp);
(...skipping 26 matching lines...) Expand all
2241 __ b(&fail, NE); 2171 __ b(&fail, NE);
2242 __ vmovrs(shift, sout1); 2172 __ vmovrs(shift, sout1);
2243 __ CompareImmediate(shift, -1); 2173 __ CompareImmediate(shift, -1);
2244 __ b(&fail, NE); 2174 __ b(&fail, NE);
2245 2175
2246 __ LoadImmediate(R0, 1); 2176 __ LoadImmediate(R0, 1);
2247 __ bx(LR); 2177 __ bx(LR);
2248 2178
2249 __ Bind(&fail); 2179 __ Bind(&fail);
2250 __ LoadImmediate(R0, 0); 2180 __ LoadImmediate(R0, 0);
2251 } else {
2252 __ LoadImmediate(R0, 1);
2253 } 2181 }
2254 __ bx(LR); 2182 __ bx(LR);
2255 } 2183 }
2256 2184
2257 2185
2258 ASSEMBLER_TEST_RUN(Mint_shl_ok, test) { 2186 ASSEMBLER_TEST_RUN(Mint_shl_ok, test) {
2259 EXPECT(test != NULL); 2187 EXPECT(test != NULL);
2260 typedef int (*Tst)() DART_UNUSED; 2188 if (TargetCPUFeatures::neon_supported()) {
2261 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2189 typedef int (*Tst)() DART_UNUSED;
2190 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2191 }
2262 } 2192 }
2263 2193
2264 2194
2265 ASSEMBLER_TEST_GENERATE(Mint_shl_overflow, assembler) { 2195 ASSEMBLER_TEST_GENERATE(Mint_shl_overflow, assembler) {
2266 if (TargetCPUFeatures::neon_supported()) { 2196 if (TargetCPUFeatures::neon_supported()) {
2267 const QRegister value = Q0; 2197 const QRegister value = Q0;
2268 const QRegister temp = Q1; 2198 const QRegister temp = Q1;
2269 const QRegister out = Q2; 2199 const QRegister out = Q2;
2270 const Register shift = R1; 2200 const Register shift = R1;
2271 const DRegister dtemp0 = EvenDRegisterOf(temp); 2201 const DRegister dtemp0 = EvenDRegisterOf(temp);
(...skipping 26 matching lines...) Expand all
2298 __ b(&fail, NE); 2228 __ b(&fail, NE);
2299 __ vmovrs(shift, sout1); 2229 __ vmovrs(shift, sout1);
2300 __ CompareImmediate(shift, -1); 2230 __ CompareImmediate(shift, -1);
2301 __ b(&fail, NE); 2231 __ b(&fail, NE);
2302 2232
2303 __ LoadImmediate(R0, 0); 2233 __ LoadImmediate(R0, 0);
2304 __ bx(LR); 2234 __ bx(LR);
2305 2235
2306 __ Bind(&fail); 2236 __ Bind(&fail);
2307 __ LoadImmediate(R0, 1); 2237 __ LoadImmediate(R0, 1);
2308 } else {
2309 __ LoadImmediate(R0, 1);
2310 } 2238 }
2311 __ bx(LR); 2239 __ bx(LR);
2312 } 2240 }
2313 2241
2314 2242
2315 ASSEMBLER_TEST_RUN(Mint_shl_overflow, test) { 2243 ASSEMBLER_TEST_RUN(Mint_shl_overflow, test) {
2316 EXPECT(test != NULL); 2244 EXPECT(test != NULL);
2317 typedef int (*Tst)() DART_UNUSED; 2245 if (TargetCPUFeatures::neon_supported()) {
2318 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2246 typedef int (*Tst)() DART_UNUSED;
2247 EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2248 }
2319 } 2249 }
2320 2250
2321 2251
2322 ASSEMBLER_TEST_GENERATE(Vsubqi8, assembler) { 2252 ASSEMBLER_TEST_GENERATE(Vsubqi8, assembler) {
2323 if (TargetCPUFeatures::neon_supported()) { 2253 if (TargetCPUFeatures::neon_supported()) {
2324 __ mov(R0, Operand(1)); 2254 __ mov(R0, Operand(1));
2325 __ vmovsr(S0, R0); 2255 __ vmovsr(S0, R0);
2326 __ mov(R0, Operand(2)); 2256 __ mov(R0, Operand(2));
2327 __ vmovsr(S1, R0); 2257 __ vmovsr(S1, R0);
2328 __ mov(R0, Operand(3)); 2258 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
2341 __ vsubqi(kByte, Q2, Q1, Q0); 2271 __ vsubqi(kByte, Q2, Q1, Q0);
2342 2272
2343 __ vmovrs(R0, S8); 2273 __ vmovrs(R0, S8);
2344 __ vmovrs(R1, S9); 2274 __ vmovrs(R1, S9);
2345 __ vmovrs(R2, S10); 2275 __ vmovrs(R2, S10);
2346 __ vmovrs(R3, S11); 2276 __ vmovrs(R3, S11);
2347 2277
2348 __ add(R0, R0, Operand(R1)); 2278 __ add(R0, R0, Operand(R1));
2349 __ add(R0, R0, Operand(R2)); 2279 __ add(R0, R0, Operand(R2));
2350 __ add(R0, R0, Operand(R3)); 2280 __ add(R0, R0, Operand(R3));
2351 __ bx(LR);
2352 } else {
2353 __ LoadImmediate(R0, 10);
2354 __ bx(LR);
2355 } 2281 }
2282 __ bx(LR);
2356 } 2283 }
2357 2284
2358 2285
2359 ASSEMBLER_TEST_RUN(Vsubqi8, test) { 2286 ASSEMBLER_TEST_RUN(Vsubqi8, test) {
2360 EXPECT(test != NULL); 2287 EXPECT(test != NULL);
2361 typedef int (*Tst)() DART_UNUSED; 2288 if (TargetCPUFeatures::neon_supported()) {
2362 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2289 typedef int (*Tst)() DART_UNUSED;
2290 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2291 }
2363 } 2292 }
2364 2293
2365 2294
2366 ASSEMBLER_TEST_GENERATE(Vsubqi16, assembler) { 2295 ASSEMBLER_TEST_GENERATE(Vsubqi16, assembler) {
2367 if (TargetCPUFeatures::neon_supported()) { 2296 if (TargetCPUFeatures::neon_supported()) {
2368 __ mov(R0, Operand(1)); 2297 __ mov(R0, Operand(1));
2369 __ vmovsr(S0, R0); 2298 __ vmovsr(S0, R0);
2370 __ mov(R0, Operand(2)); 2299 __ mov(R0, Operand(2));
2371 __ vmovsr(S1, R0); 2300 __ vmovsr(S1, R0);
2372 __ mov(R0, Operand(3)); 2301 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
2385 __ vsubqi(kHalfword, Q2, Q1, Q0); 2314 __ vsubqi(kHalfword, Q2, Q1, Q0);
2386 2315
2387 __ vmovrs(R0, S8); 2316 __ vmovrs(R0, S8);
2388 __ vmovrs(R1, S9); 2317 __ vmovrs(R1, S9);
2389 __ vmovrs(R2, S10); 2318 __ vmovrs(R2, S10);
2390 __ vmovrs(R3, S11); 2319 __ vmovrs(R3, S11);
2391 2320
2392 __ add(R0, R0, Operand(R1)); 2321 __ add(R0, R0, Operand(R1));
2393 __ add(R0, R0, Operand(R2)); 2322 __ add(R0, R0, Operand(R2));
2394 __ add(R0, R0, Operand(R3)); 2323 __ add(R0, R0, Operand(R3));
2395 __ bx(LR);
2396 } else {
2397 __ LoadImmediate(R0, 10);
2398 __ bx(LR);
2399 } 2324 }
2325 __ bx(LR);
2400 } 2326 }
2401 2327
2402 2328
2403 ASSEMBLER_TEST_RUN(Vsubqi16, test) { 2329 ASSEMBLER_TEST_RUN(Vsubqi16, test) {
2404 EXPECT(test != NULL); 2330 EXPECT(test != NULL);
2405 typedef int (*Tst)() DART_UNUSED; 2331 if (TargetCPUFeatures::neon_supported()) {
2406 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2332 typedef int (*Tst)() DART_UNUSED;
2333 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2334 }
2407 } 2335 }
2408 2336
2409 2337
2410 ASSEMBLER_TEST_GENERATE(Vsubqi32, assembler) { 2338 ASSEMBLER_TEST_GENERATE(Vsubqi32, assembler) {
2411 if (TargetCPUFeatures::neon_supported()) { 2339 if (TargetCPUFeatures::neon_supported()) {
2412 __ mov(R0, Operand(1)); 2340 __ mov(R0, Operand(1));
2413 __ vmovsr(S0, R0); 2341 __ vmovsr(S0, R0);
2414 __ mov(R0, Operand(2)); 2342 __ mov(R0, Operand(2));
2415 __ vmovsr(S1, R0); 2343 __ vmovsr(S1, R0);
2416 __ mov(R0, Operand(3)); 2344 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
2429 __ vsubqi(kWord, Q2, Q1, Q0); 2357 __ vsubqi(kWord, Q2, Q1, Q0);
2430 2358
2431 __ vmovrs(R0, S8); 2359 __ vmovrs(R0, S8);
2432 __ vmovrs(R1, S9); 2360 __ vmovrs(R1, S9);
2433 __ vmovrs(R2, S10); 2361 __ vmovrs(R2, S10);
2434 __ vmovrs(R3, S11); 2362 __ vmovrs(R3, S11);
2435 2363
2436 __ add(R0, R0, Operand(R1)); 2364 __ add(R0, R0, Operand(R1));
2437 __ add(R0, R0, Operand(R2)); 2365 __ add(R0, R0, Operand(R2));
2438 __ add(R0, R0, Operand(R3)); 2366 __ add(R0, R0, Operand(R3));
2439 __ bx(LR);
2440 } else {
2441 __ LoadImmediate(R0, 10);
2442 __ bx(LR);
2443 } 2367 }
2368 __ bx(LR);
2444 } 2369 }
2445 2370
2446 2371
2447 ASSEMBLER_TEST_RUN(Vsubqi32, test) { 2372 ASSEMBLER_TEST_RUN(Vsubqi32, test) {
2448 EXPECT(test != NULL); 2373 EXPECT(test != NULL);
2449 typedef int (*Tst)() DART_UNUSED; 2374 if (TargetCPUFeatures::neon_supported()) {
2450 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2375 typedef int (*Tst)() DART_UNUSED;
2376 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2377 }
2451 } 2378 }
2452 2379
2453 2380
2454 ASSEMBLER_TEST_GENERATE(Vsubqi64, assembler) { 2381 ASSEMBLER_TEST_GENERATE(Vsubqi64, assembler) {
2455 if (TargetCPUFeatures::neon_supported()) { 2382 if (TargetCPUFeatures::neon_supported()) {
2456 __ mov(R0, Operand(1)); 2383 __ mov(R0, Operand(1));
2457 __ vmovsr(S0, R0); 2384 __ vmovsr(S0, R0);
2458 __ mov(R0, Operand(2)); 2385 __ mov(R0, Operand(2));
2459 __ vmovsr(S2, R0); 2386 __ vmovsr(S2, R0);
2460 __ mov(R0, Operand(2)); 2387 __ mov(R0, Operand(2));
2461 __ vmovsr(S4, R0); 2388 __ vmovsr(S4, R0);
2462 __ mov(R0, Operand(4)); 2389 __ mov(R0, Operand(4));
2463 __ vmovsr(S6, R0); 2390 __ vmovsr(S6, R0);
2464 2391
2465 __ vsubqi(kWordPair, Q2, Q1, Q0); 2392 __ vsubqi(kWordPair, Q2, Q1, Q0);
2466 2393
2467 __ vmovrs(R0, S8); 2394 __ vmovrs(R0, S8);
2468 __ vmovrs(R2, S10); 2395 __ vmovrs(R2, S10);
2469 2396
2470 __ add(R0, R0, Operand(R2)); 2397 __ add(R0, R0, Operand(R2));
2471 __ bx(LR);
2472 } else {
2473 __ LoadImmediate(R0, 3);
2474 __ bx(LR);
2475 } 2398 }
2399 __ bx(LR);
2476 } 2400 }
2477 2401
2478 2402
2479 ASSEMBLER_TEST_RUN(Vsubqi64, test) { 2403 ASSEMBLER_TEST_RUN(Vsubqi64, test) {
2480 EXPECT(test != NULL); 2404 EXPECT(test != NULL);
2481 typedef int (*Tst)() DART_UNUSED; 2405 if (TargetCPUFeatures::neon_supported()) {
2482 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2406 typedef int (*Tst)() DART_UNUSED;
2407 EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2408 }
2483 } 2409 }
2484 2410
2485 2411
2486 ASSEMBLER_TEST_GENERATE(Vmulqi8, assembler) { 2412 ASSEMBLER_TEST_GENERATE(Vmulqi8, assembler) {
2487 if (TargetCPUFeatures::neon_supported()) { 2413 if (TargetCPUFeatures::neon_supported()) {
2488 __ mov(R0, Operand(1)); 2414 __ mov(R0, Operand(1));
2489 __ vmovsr(S0, R0); 2415 __ vmovsr(S0, R0);
2490 __ mov(R0, Operand(2)); 2416 __ mov(R0, Operand(2));
2491 __ vmovsr(S1, R0); 2417 __ vmovsr(S1, R0);
2492 __ mov(R0, Operand(3)); 2418 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
2505 __ vmulqi(kByte, Q2, Q1, Q0); 2431 __ vmulqi(kByte, Q2, Q1, Q0);
2506 2432
2507 __ vmovrs(R0, S8); 2433 __ vmovrs(R0, S8);
2508 __ vmovrs(R1, S9); 2434 __ vmovrs(R1, S9);
2509 __ vmovrs(R2, S10); 2435 __ vmovrs(R2, S10);
2510 __ vmovrs(R3, S11); 2436 __ vmovrs(R3, S11);
2511 2437
2512 __ add(R0, R0, Operand(R1)); 2438 __ add(R0, R0, Operand(R1));
2513 __ add(R0, R0, Operand(R2)); 2439 __ add(R0, R0, Operand(R2));
2514 __ add(R0, R0, Operand(R3)); 2440 __ add(R0, R0, Operand(R3));
2515 __ bx(LR);
2516 } else {
2517 __ LoadImmediate(R0, 70);
2518 __ bx(LR);
2519 } 2441 }
2442 __ bx(LR);
2520 } 2443 }
2521 2444
2522 2445
2523 ASSEMBLER_TEST_RUN(Vmulqi8, test) { 2446 ASSEMBLER_TEST_RUN(Vmulqi8, test) {
2524 EXPECT(test != NULL); 2447 EXPECT(test != NULL);
2525 typedef int (*Tst)() DART_UNUSED; 2448 if (TargetCPUFeatures::neon_supported()) {
2526 EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2449 typedef int (*Tst)() DART_UNUSED;
2450 EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2451 }
2527 } 2452 }
2528 2453
2529 2454
2530 ASSEMBLER_TEST_GENERATE(Vmulqi16, assembler) { 2455 ASSEMBLER_TEST_GENERATE(Vmulqi16, assembler) {
2531 if (TargetCPUFeatures::neon_supported()) { 2456 if (TargetCPUFeatures::neon_supported()) {
2532 __ mov(R0, Operand(1)); 2457 __ mov(R0, Operand(1));
2533 __ vmovsr(S0, R0); 2458 __ vmovsr(S0, R0);
2534 __ mov(R0, Operand(2)); 2459 __ mov(R0, Operand(2));
2535 __ vmovsr(S1, R0); 2460 __ vmovsr(S1, R0);
2536 __ mov(R0, Operand(3)); 2461 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
2549 __ vmulqi(kHalfword, Q2, Q1, Q0); 2474 __ vmulqi(kHalfword, Q2, Q1, Q0);
2550 2475
2551 __ vmovrs(R0, S8); 2476 __ vmovrs(R0, S8);
2552 __ vmovrs(R1, S9); 2477 __ vmovrs(R1, S9);
2553 __ vmovrs(R2, S10); 2478 __ vmovrs(R2, S10);
2554 __ vmovrs(R3, S11); 2479 __ vmovrs(R3, S11);
2555 2480
2556 __ add(R0, R0, Operand(R1)); 2481 __ add(R0, R0, Operand(R1));
2557 __ add(R0, R0, Operand(R2)); 2482 __ add(R0, R0, Operand(R2));
2558 __ add(R0, R0, Operand(R3)); 2483 __ add(R0, R0, Operand(R3));
2559 __ bx(LR);
2560 } else {
2561 __ LoadImmediate(R0, 70);
2562 __ bx(LR);
2563 } 2484 }
2485 __ bx(LR);
2564 } 2486 }
2565 2487
2566 2488
2567 ASSEMBLER_TEST_RUN(Vmulqi16, test) { 2489 ASSEMBLER_TEST_RUN(Vmulqi16, test) {
2568 EXPECT(test != NULL); 2490 EXPECT(test != NULL);
2569 typedef int (*Tst)() DART_UNUSED; 2491 if (TargetCPUFeatures::neon_supported()) {
2570 EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2492 typedef int (*Tst)() DART_UNUSED;
2493 EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2494 }
2571 } 2495 }
2572 2496
2573 2497
2574 ASSEMBLER_TEST_GENERATE(Vmulqi32, assembler) { 2498 ASSEMBLER_TEST_GENERATE(Vmulqi32, assembler) {
2575 if (TargetCPUFeatures::neon_supported()) { 2499 if (TargetCPUFeatures::neon_supported()) {
2576 __ mov(R0, Operand(1)); 2500 __ mov(R0, Operand(1));
2577 __ vmovsr(S0, R0); 2501 __ vmovsr(S0, R0);
2578 __ mov(R0, Operand(2)); 2502 __ mov(R0, Operand(2));
2579 __ vmovsr(S1, R0); 2503 __ vmovsr(S1, R0);
2580 __ mov(R0, Operand(3)); 2504 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
2593 __ vmulqi(kWord, Q2, Q1, Q0); 2517 __ vmulqi(kWord, Q2, Q1, Q0);
2594 2518
2595 __ vmovrs(R0, S8); 2519 __ vmovrs(R0, S8);
2596 __ vmovrs(R1, S9); 2520 __ vmovrs(R1, S9);
2597 __ vmovrs(R2, S10); 2521 __ vmovrs(R2, S10);
2598 __ vmovrs(R3, S11); 2522 __ vmovrs(R3, S11);
2599 2523
2600 __ add(R0, R0, Operand(R1)); 2524 __ add(R0, R0, Operand(R1));
2601 __ add(R0, R0, Operand(R2)); 2525 __ add(R0, R0, Operand(R2));
2602 __ add(R0, R0, Operand(R3)); 2526 __ add(R0, R0, Operand(R3));
2603 __ bx(LR);
2604 } else {
2605 __ LoadImmediate(R0, 70);
2606 __ bx(LR);
2607 } 2527 }
2528 __ bx(LR);
2608 } 2529 }
2609 2530
2610 2531
2611 ASSEMBLER_TEST_RUN(Vmulqi32, test) { 2532 ASSEMBLER_TEST_RUN(Vmulqi32, test) {
2612 EXPECT(test != NULL); 2533 EXPECT(test != NULL);
2613 typedef int (*Tst)() DART_UNUSED; 2534 if (TargetCPUFeatures::neon_supported()) {
2614 EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2535 typedef int (*Tst)() DART_UNUSED;
2536 EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2537 }
2615 } 2538 }
2616 2539
2617 2540
2618 ASSEMBLER_TEST_GENERATE(Vaddqs, assembler) { 2541 ASSEMBLER_TEST_GENERATE(Vaddqs, assembler) {
2619 if (TargetCPUFeatures::neon_supported()) { 2542 if (TargetCPUFeatures::neon_supported()) {
2620 __ LoadSImmediate(S0, 1.0); 2543 __ LoadSImmediate(S0, 1.0);
2621 __ LoadSImmediate(S1, 2.0); 2544 __ LoadSImmediate(S1, 2.0);
2622 __ LoadSImmediate(S2, 3.0); 2545 __ LoadSImmediate(S2, 3.0);
2623 __ LoadSImmediate(S3, 4.0); 2546 __ LoadSImmediate(S3, 4.0);
2624 __ LoadSImmediate(S4, 5.0); 2547 __ LoadSImmediate(S4, 5.0);
2625 __ LoadSImmediate(S5, 6.0); 2548 __ LoadSImmediate(S5, 6.0);
2626 __ LoadSImmediate(S6, 7.0); 2549 __ LoadSImmediate(S6, 7.0);
2627 __ LoadSImmediate(S7, 8.0); 2550 __ LoadSImmediate(S7, 8.0);
2628 2551
2629 __ vaddqs(Q2, Q0, Q1); 2552 __ vaddqs(Q2, Q0, Q1);
2630 2553
2631 __ vadds(S8, S8, S9); 2554 __ vadds(S8, S8, S9);
2632 __ vadds(S8, S8, S10); 2555 __ vadds(S8, S8, S10);
2633 __ vadds(S8, S8, S11); 2556 __ vadds(S8, S8, S11);
2634 2557
2635 __ vcvtis(S0, S8); 2558 __ vcvtis(S0, S8);
2636 __ vmovrs(R0, S0); 2559 __ vmovrs(R0, S0);
2637
2638 __ bx(LR);
2639 } else {
2640 __ LoadImmediate(R0, 36);
2641 __ bx(LR);
2642 } 2560 }
2561 __ bx(LR);
2643 } 2562 }
2644 2563
2645 2564
2646 ASSEMBLER_TEST_RUN(Vaddqs, test) { 2565 ASSEMBLER_TEST_RUN(Vaddqs, test) {
2647 EXPECT(test != NULL); 2566 EXPECT(test != NULL);
2648 typedef int (*Tst)() DART_UNUSED; 2567 if (TargetCPUFeatures::neon_supported()) {
2649 EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2568 typedef int (*Tst)() DART_UNUSED;
2569 EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2570 }
2650 } 2571 }
2651 2572
2652 2573
2653 ASSEMBLER_TEST_GENERATE(Vsubqs, assembler) { 2574 ASSEMBLER_TEST_GENERATE(Vsubqs, assembler) {
2654 if (TargetCPUFeatures::neon_supported()) { 2575 if (TargetCPUFeatures::neon_supported()) {
2655 __ LoadSImmediate(S0, 1.0); 2576 __ LoadSImmediate(S0, 1.0);
2656 __ LoadSImmediate(S1, 2.0); 2577 __ LoadSImmediate(S1, 2.0);
2657 __ LoadSImmediate(S2, 3.0); 2578 __ LoadSImmediate(S2, 3.0);
2658 __ LoadSImmediate(S3, 4.0); 2579 __ LoadSImmediate(S3, 4.0);
2659 __ LoadSImmediate(S4, 2.0); 2580 __ LoadSImmediate(S4, 2.0);
2660 __ LoadSImmediate(S5, 4.0); 2581 __ LoadSImmediate(S5, 4.0);
2661 __ LoadSImmediate(S6, 6.0); 2582 __ LoadSImmediate(S6, 6.0);
2662 __ LoadSImmediate(S7, 8.0); 2583 __ LoadSImmediate(S7, 8.0);
2663 2584
2664 __ vsubqs(Q2, Q1, Q0); 2585 __ vsubqs(Q2, Q1, Q0);
2665 2586
2666 __ vadds(S8, S8, S9); 2587 __ vadds(S8, S8, S9);
2667 __ vadds(S8, S8, S10); 2588 __ vadds(S8, S8, S10);
2668 __ vadds(S8, S8, S11); 2589 __ vadds(S8, S8, S11);
2669 2590
2670 __ vcvtis(S0, S8); 2591 __ vcvtis(S0, S8);
2671 __ vmovrs(R0, S0); 2592 __ vmovrs(R0, S0);
2672
2673 __ bx(LR);
2674 } else {
2675 __ LoadImmediate(R0, 10);
2676 __ bx(LR);
2677 } 2593 }
2594 __ bx(LR);
2678 } 2595 }
2679 2596
2680 2597
2681 ASSEMBLER_TEST_RUN(Vsubqs, test) { 2598 ASSEMBLER_TEST_RUN(Vsubqs, test) {
2682 EXPECT(test != NULL); 2599 EXPECT(test != NULL);
2683 typedef int (*Tst)() DART_UNUSED; 2600 if (TargetCPUFeatures::neon_supported()) {
2684 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2601 typedef int (*Tst)() DART_UNUSED;
2602 EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2603 }
2685 } 2604 }
2686 2605
2687 2606
2688 ASSEMBLER_TEST_GENERATE(Vmulqs, assembler) { 2607 ASSEMBLER_TEST_GENERATE(Vmulqs, assembler) {
2689 if (TargetCPUFeatures::neon_supported()) { 2608 if (TargetCPUFeatures::neon_supported()) {
2690 __ LoadSImmediate(S0, 1.0); 2609 __ LoadSImmediate(S0, 1.0);
2691 __ LoadSImmediate(S1, 2.0); 2610 __ LoadSImmediate(S1, 2.0);
2692 __ LoadSImmediate(S2, 3.0); 2611 __ LoadSImmediate(S2, 3.0);
2693 __ LoadSImmediate(S3, 4.0); 2612 __ LoadSImmediate(S3, 4.0);
2694 __ LoadSImmediate(S4, 5.0); 2613 __ LoadSImmediate(S4, 5.0);
2695 __ LoadSImmediate(S5, 6.0); 2614 __ LoadSImmediate(S5, 6.0);
2696 __ LoadSImmediate(S6, 7.0); 2615 __ LoadSImmediate(S6, 7.0);
2697 __ LoadSImmediate(S7, 8.0); 2616 __ LoadSImmediate(S7, 8.0);
2698 2617
2699 __ vmulqs(Q2, Q1, Q0); 2618 __ vmulqs(Q2, Q1, Q0);
2700 2619
2701 __ vadds(S8, S8, S9); 2620 __ vadds(S8, S8, S9);
2702 __ vadds(S8, S8, S10); 2621 __ vadds(S8, S8, S10);
2703 __ vadds(S8, S8, S11); 2622 __ vadds(S8, S8, S11);
2704 2623
2705 __ vcvtis(S0, S8); 2624 __ vcvtis(S0, S8);
2706 __ vmovrs(R0, S0); 2625 __ vmovrs(R0, S0);
2707
2708 __ bx(LR);
2709 } else {
2710 __ LoadImmediate(R0, 70);
2711 __ bx(LR);
2712 } 2626 }
2627 __ bx(LR);
2713 } 2628 }
2714 2629
2715 2630
2716 ASSEMBLER_TEST_RUN(Vmulqs, test) { 2631 ASSEMBLER_TEST_RUN(Vmulqs, test) {
2717 EXPECT(test != NULL); 2632 EXPECT(test != NULL);
2718 typedef int (*Tst)() DART_UNUSED; 2633 if (TargetCPUFeatures::neon_supported()) {
2719 EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2634 typedef int (*Tst)() DART_UNUSED;
2635 EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2636 }
2720 } 2637 }
2721 2638
2722 2639
2723 ASSEMBLER_TEST_GENERATE(VtblX, assembler) { 2640 ASSEMBLER_TEST_GENERATE(VtblX, assembler) {
2724 if (TargetCPUFeatures::neon_supported()) { 2641 if (TargetCPUFeatures::neon_supported()) {
2725 // Index. 2642 // Index.
2726 __ LoadImmediate(R0, 0x03020100); 2643 __ LoadImmediate(R0, 0x03020100);
2727 __ vmovsr(S0, R0); 2644 __ vmovsr(S0, R0);
2728 __ vmovsr(S1, R0); 2645 __ vmovsr(S1, R0);
2729 2646
(...skipping 11 matching lines...) Expand all
2741 __ vcvtis(S1, S7); 2658 __ vcvtis(S1, S7);
2742 __ vmovrs(R2, S0); 2659 __ vmovrs(R2, S0);
2743 __ vmovrs(R3, S1); 2660 __ vmovrs(R3, S1);
2744 2661
2745 __ LoadImmediate(R0, 0); 2662 __ LoadImmediate(R0, 0);
2746 __ CompareImmediate(R2, 1); 2663 __ CompareImmediate(R2, 1);
2747 __ bx(LR, NE); 2664 __ bx(LR, NE);
2748 __ CompareImmediate(R3, 1); 2665 __ CompareImmediate(R3, 1);
2749 __ bx(LR, NE); 2666 __ bx(LR, NE);
2750 __ LoadImmediate(R0, 42); 2667 __ LoadImmediate(R0, 42);
2751 __ bx(LR);
2752 } else {
2753 __ LoadImmediate(R0, 42);
2754 __ bx(LR);
2755 } 2668 }
2669 __ bx(LR);
2756 } 2670 }
2757 2671
2758 2672
2759 ASSEMBLER_TEST_RUN(VtblX, test) { 2673 ASSEMBLER_TEST_RUN(VtblX, test) {
2760 EXPECT(test != NULL); 2674 EXPECT(test != NULL);
2761 typedef int (*Tst)() DART_UNUSED; 2675 if (TargetCPUFeatures::neon_supported()) {
2762 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2676 typedef int (*Tst)() DART_UNUSED;
2677 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2678 }
2763 } 2679 }
2764 2680
2765 2681
2766 ASSEMBLER_TEST_GENERATE(VtblY, assembler) { 2682 ASSEMBLER_TEST_GENERATE(VtblY, assembler) {
2767 if (TargetCPUFeatures::neon_supported()) { 2683 if (TargetCPUFeatures::neon_supported()) {
2768 // Index. 2684 // Index.
2769 __ LoadImmediate(R0, 0x07060504); 2685 __ LoadImmediate(R0, 0x07060504);
2770 __ vmovsr(S0, R0); 2686 __ vmovsr(S0, R0);
2771 __ vmovsr(S1, R0); 2687 __ vmovsr(S1, R0);
2772 2688
(...skipping 11 matching lines...) Expand all
2784 __ vcvtis(S1, S7); 2700 __ vcvtis(S1, S7);
2785 __ vmovrs(R2, S0); 2701 __ vmovrs(R2, S0);
2786 __ vmovrs(R3, S1); 2702 __ vmovrs(R3, S1);
2787 2703
2788 __ LoadImmediate(R0, 0); 2704 __ LoadImmediate(R0, 0);
2789 __ CompareImmediate(R2, 1); 2705 __ CompareImmediate(R2, 1);
2790 __ bx(LR, NE); 2706 __ bx(LR, NE);
2791 __ CompareImmediate(R3, 1); 2707 __ CompareImmediate(R3, 1);
2792 __ bx(LR, NE); 2708 __ bx(LR, NE);
2793 __ LoadImmediate(R0, 42); 2709 __ LoadImmediate(R0, 42);
2794 __ bx(LR);
2795 } else {
2796 __ LoadImmediate(R0, 42);
2797 __ bx(LR);
2798 } 2710 }
2711 __ bx(LR);
2799 } 2712 }
2800 2713
2801 2714
2802 ASSEMBLER_TEST_RUN(VtblY, test) { 2715 ASSEMBLER_TEST_RUN(VtblY, test) {
2803 EXPECT(test != NULL); 2716 EXPECT(test != NULL);
2804 typedef int (*Tst)() DART_UNUSED; 2717 if (TargetCPUFeatures::neon_supported()) {
2805 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2718 typedef int (*Tst)() DART_UNUSED;
2719 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2720 }
2806 } 2721 }
2807 2722
2808 2723
2809 ASSEMBLER_TEST_GENERATE(VtblZ, assembler) { 2724 ASSEMBLER_TEST_GENERATE(VtblZ, assembler) {
2810 if (TargetCPUFeatures::neon_supported()) { 2725 if (TargetCPUFeatures::neon_supported()) {
2811 // Index. 2726 // Index.
2812 __ LoadImmediate(R0, 0x0b0a0908); 2727 __ LoadImmediate(R0, 0x0b0a0908);
2813 __ vmovsr(S0, R0); 2728 __ vmovsr(S0, R0);
2814 __ vmovsr(S1, R0); 2729 __ vmovsr(S1, R0);
2815 2730
(...skipping 11 matching lines...) Expand all
2827 __ vcvtis(S1, S7); 2742 __ vcvtis(S1, S7);
2828 __ vmovrs(R2, S0); 2743 __ vmovrs(R2, S0);
2829 __ vmovrs(R3, S1); 2744 __ vmovrs(R3, S1);
2830 2745
2831 __ LoadImmediate(R0, 0); 2746 __ LoadImmediate(R0, 0);
2832 __ CompareImmediate(R2, 1); 2747 __ CompareImmediate(R2, 1);
2833 __ bx(LR, NE); 2748 __ bx(LR, NE);
2834 __ CompareImmediate(R3, 1); 2749 __ CompareImmediate(R3, 1);
2835 __ bx(LR, NE); 2750 __ bx(LR, NE);
2836 __ LoadImmediate(R0, 42); 2751 __ LoadImmediate(R0, 42);
2837 __ bx(LR);
2838 } else {
2839 __ LoadImmediate(R0, 42);
2840 __ bx(LR);
2841 } 2752 }
2753 __ bx(LR);
2842 } 2754 }
2843 2755
2844 2756
2845 ASSEMBLER_TEST_RUN(VtblZ, test) { 2757 ASSEMBLER_TEST_RUN(VtblZ, test) {
2846 EXPECT(test != NULL); 2758 EXPECT(test != NULL);
2847 typedef int (*Tst)() DART_UNUSED; 2759 if (TargetCPUFeatures::neon_supported()) {
2848 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2760 typedef int (*Tst)() DART_UNUSED;
2761 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2762 }
2849 } 2763 }
2850 2764
2851 2765
2852 ASSEMBLER_TEST_GENERATE(VtblW, assembler) { 2766 ASSEMBLER_TEST_GENERATE(VtblW, assembler) {
2853 if (TargetCPUFeatures::neon_supported()) { 2767 if (TargetCPUFeatures::neon_supported()) {
2854 // Index. 2768 // Index.
2855 __ LoadImmediate(R0, 0x0f0e0d0c); 2769 __ LoadImmediate(R0, 0x0f0e0d0c);
2856 __ vmovsr(S0, R0); 2770 __ vmovsr(S0, R0);
2857 __ vmovsr(S1, R0); 2771 __ vmovsr(S1, R0);
2858 2772
(...skipping 11 matching lines...) Expand all
2870 __ vcvtis(S1, S7); 2784 __ vcvtis(S1, S7);
2871 __ vmovrs(R2, S0); 2785 __ vmovrs(R2, S0);
2872 __ vmovrs(R3, S1); 2786 __ vmovrs(R3, S1);
2873 2787
2874 __ LoadImmediate(R0, 0); 2788 __ LoadImmediate(R0, 0);
2875 __ CompareImmediate(R2, 1); 2789 __ CompareImmediate(R2, 1);
2876 __ bx(LR, NE); 2790 __ bx(LR, NE);
2877 __ CompareImmediate(R3, 1); 2791 __ CompareImmediate(R3, 1);
2878 __ bx(LR, NE); 2792 __ bx(LR, NE);
2879 __ LoadImmediate(R0, 42); 2793 __ LoadImmediate(R0, 42);
2880 __ bx(LR);
2881 } else {
2882 __ LoadImmediate(R0, 42);
2883 __ bx(LR);
2884 } 2794 }
2795 __ bx(LR);
2885 } 2796 }
2886 2797
2887 2798
2888 ASSEMBLER_TEST_RUN(VtblW, test) { 2799 ASSEMBLER_TEST_RUN(VtblW, test) {
2889 EXPECT(test != NULL); 2800 EXPECT(test != NULL);
2890 typedef int (*Tst)() DART_UNUSED; 2801 if (TargetCPUFeatures::neon_supported()) {
2891 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2802 typedef int (*Tst)() DART_UNUSED;
2803 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2804 }
2892 } 2805 }
2893 2806
2894 2807
2895 ASSEMBLER_TEST_GENERATE(Veorq, assembler) { 2808 ASSEMBLER_TEST_GENERATE(Veorq, assembler) {
2896 if (TargetCPUFeatures::neon_supported()) { 2809 if (TargetCPUFeatures::neon_supported()) {
2897 // Q0 2810 // Q0
2898 __ LoadImmediate(R0, 0xaaaaaaab); 2811 __ LoadImmediate(R0, 0xaaaaaaab);
2899 __ vmovsr(S0, R0); 2812 __ vmovsr(S0, R0);
2900 __ vmovsr(S1, R0); 2813 __ vmovsr(S1, R0);
2901 __ vmovsr(S2, R0); 2814 __ vmovsr(S2, R0);
(...skipping 10 matching lines...) Expand all
2912 __ veorq(Q2, Q1, Q0); 2825 __ veorq(Q2, Q1, Q0);
2913 2826
2914 __ vmovrs(R0, S8); 2827 __ vmovrs(R0, S8);
2915 __ vmovrs(R1, S9); 2828 __ vmovrs(R1, S9);
2916 __ vmovrs(R2, S10); 2829 __ vmovrs(R2, S10);
2917 __ vmovrs(R3, S11); 2830 __ vmovrs(R3, S11);
2918 2831
2919 __ add(R0, R0, Operand(R1)); 2832 __ add(R0, R0, Operand(R1));
2920 __ add(R0, R0, Operand(R2)); 2833 __ add(R0, R0, Operand(R2));
2921 __ add(R0, R0, Operand(R3)); 2834 __ add(R0, R0, Operand(R3));
2922 __ bx(LR);
2923 } else {
2924 __ LoadImmediate(R0, -8);
2925 __ bx(LR);
2926 } 2835 }
2836 __ bx(LR);
2927 } 2837 }
2928 2838
2929 2839
2930 ASSEMBLER_TEST_RUN(Veorq, test) { 2840 ASSEMBLER_TEST_RUN(Veorq, test) {
2931 EXPECT(test != NULL); 2841 EXPECT(test != NULL);
2932 typedef int (*Tst)() DART_UNUSED; 2842 if (TargetCPUFeatures::neon_supported()) {
2933 EXPECT_EQ(-8, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2843 typedef int (*Tst)() DART_UNUSED;
2844 EXPECT_EQ(-8, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2845 }
2934 } 2846 }
2935 2847
2936 2848
2937 ASSEMBLER_TEST_GENERATE(Vornq, assembler) { 2849 ASSEMBLER_TEST_GENERATE(Vornq, assembler) {
2938 if (TargetCPUFeatures::neon_supported()) { 2850 if (TargetCPUFeatures::neon_supported()) {
2939 // Q0 2851 // Q0
2940 __ LoadImmediate(R0, 0xfffffff0); 2852 __ LoadImmediate(R0, 0xfffffff0);
2941 __ vmovsr(S0, R0); 2853 __ vmovsr(S0, R0);
2942 __ vmovsr(S1, R0); 2854 __ vmovsr(S1, R0);
2943 __ vmovsr(S2, R0); 2855 __ vmovsr(S2, R0);
(...skipping 10 matching lines...) Expand all
2954 __ vornq(Q2, Q1, Q0); 2866 __ vornq(Q2, Q1, Q0);
2955 2867
2956 __ vmovrs(R0, S8); 2868 __ vmovrs(R0, S8);
2957 __ vmovrs(R1, S9); 2869 __ vmovrs(R1, S9);
2958 __ vmovrs(R2, S10); 2870 __ vmovrs(R2, S10);
2959 __ vmovrs(R3, S11); 2871 __ vmovrs(R3, S11);
2960 2872
2961 __ add(R0, R0, Operand(R1)); 2873 __ add(R0, R0, Operand(R1));
2962 __ add(R0, R0, Operand(R2)); 2874 __ add(R0, R0, Operand(R2));
2963 __ add(R0, R0, Operand(R3)); 2875 __ add(R0, R0, Operand(R3));
2964 __ bx(LR);
2965 } else {
2966 __ LoadImmediate(R0, 60);
2967 __ bx(LR);
2968 } 2876 }
2877 __ bx(LR);
2969 } 2878 }
2970 2879
2971 2880
2972 ASSEMBLER_TEST_RUN(Vornq, test) { 2881 ASSEMBLER_TEST_RUN(Vornq, test) {
2973 EXPECT(test != NULL); 2882 EXPECT(test != NULL);
2974 typedef int (*Tst)() DART_UNUSED; 2883 if (TargetCPUFeatures::neon_supported()) {
2975 EXPECT_EQ(60, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2884 typedef int (*Tst)() DART_UNUSED;
2885 EXPECT_EQ(60, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2886 }
2976 } 2887 }
2977 2888
2978 2889
2979 ASSEMBLER_TEST_GENERATE(Vorrq, assembler) { 2890 ASSEMBLER_TEST_GENERATE(Vorrq, assembler) {
2980 if (TargetCPUFeatures::neon_supported()) { 2891 if (TargetCPUFeatures::neon_supported()) {
2981 // Q0 2892 // Q0
2982 __ LoadImmediate(R0, 0xaaaaaaaa); 2893 __ LoadImmediate(R0, 0xaaaaaaaa);
2983 __ vmovsr(S0, R0); 2894 __ vmovsr(S0, R0);
2984 __ vmovsr(S1, R0); 2895 __ vmovsr(S1, R0);
2985 __ vmovsr(S2, R0); 2896 __ vmovsr(S2, R0);
(...skipping 10 matching lines...) Expand all
2996 __ vorrq(Q2, Q1, Q0); 2907 __ vorrq(Q2, Q1, Q0);
2997 2908
2998 __ vmovrs(R0, S8); 2909 __ vmovrs(R0, S8);
2999 __ vmovrs(R1, S9); 2910 __ vmovrs(R1, S9);
3000 __ vmovrs(R2, S10); 2911 __ vmovrs(R2, S10);
3001 __ vmovrs(R3, S11); 2912 __ vmovrs(R3, S11);
3002 2913
3003 __ add(R0, R0, Operand(R1)); 2914 __ add(R0, R0, Operand(R1));
3004 __ add(R0, R0, Operand(R2)); 2915 __ add(R0, R0, Operand(R2));
3005 __ add(R0, R0, Operand(R3)); 2916 __ add(R0, R0, Operand(R3));
3006 __ bx(LR);
3007 } else {
3008 __ LoadImmediate(R0, -4);
3009 __ bx(LR);
3010 } 2917 }
2918 __ bx(LR);
3011 } 2919 }
3012 2920
3013 2921
3014 ASSEMBLER_TEST_RUN(Vorrq, test) { 2922 ASSEMBLER_TEST_RUN(Vorrq, test) {
3015 EXPECT(test != NULL); 2923 EXPECT(test != NULL);
3016 typedef int (*Tst)() DART_UNUSED; 2924 if (TargetCPUFeatures::neon_supported()) {
3017 EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2925 typedef int (*Tst)() DART_UNUSED;
2926 EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2927 }
3018 } 2928 }
3019 2929
3020 2930
3021 ASSEMBLER_TEST_GENERATE(Vandq, assembler) { 2931 ASSEMBLER_TEST_GENERATE(Vandq, assembler) {
3022 if (TargetCPUFeatures::neon_supported()) { 2932 if (TargetCPUFeatures::neon_supported()) {
3023 // Q0 2933 // Q0
3024 __ LoadImmediate(R0, 0xaaaaaaab); 2934 __ LoadImmediate(R0, 0xaaaaaaab);
3025 __ vmovsr(S0, R0); 2935 __ vmovsr(S0, R0);
3026 __ vmovsr(S1, R0); 2936 __ vmovsr(S1, R0);
3027 __ vmovsr(S2, R0); 2937 __ vmovsr(S2, R0);
(...skipping 10 matching lines...) Expand all
3038 __ vandq(Q2, Q1, Q0); 2948 __ vandq(Q2, Q1, Q0);
3039 2949
3040 __ vmovrs(R0, S8); 2950 __ vmovrs(R0, S8);
3041 __ vmovrs(R1, S9); 2951 __ vmovrs(R1, S9);
3042 __ vmovrs(R2, S10); 2952 __ vmovrs(R2, S10);
3043 __ vmovrs(R3, S11); 2953 __ vmovrs(R3, S11);
3044 2954
3045 __ add(R0, R0, Operand(R1)); 2955 __ add(R0, R0, Operand(R1));
3046 __ add(R0, R0, Operand(R2)); 2956 __ add(R0, R0, Operand(R2));
3047 __ add(R0, R0, Operand(R3)); 2957 __ add(R0, R0, Operand(R3));
3048 __ bx(LR);
3049 } else {
3050 __ LoadImmediate(R0, 4);
3051 __ bx(LR);
3052 } 2958 }
2959 __ bx(LR);
3053 } 2960 }
3054 2961
3055 2962
3056 ASSEMBLER_TEST_RUN(Vandq, test) { 2963 ASSEMBLER_TEST_RUN(Vandq, test) {
3057 EXPECT(test != NULL); 2964 EXPECT(test != NULL);
3058 typedef int (*Tst)() DART_UNUSED; 2965 if (TargetCPUFeatures::neon_supported()) {
3059 EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 2966 typedef int (*Tst)() DART_UNUSED;
2967 EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
2968 }
3060 } 2969 }
3061 2970
3062 2971
3063 ASSEMBLER_TEST_GENERATE(Vmovq, assembler) { 2972 ASSEMBLER_TEST_GENERATE(Vmovq, assembler) {
3064 if (TargetCPUFeatures::neon_supported()) { 2973 if (TargetCPUFeatures::neon_supported()) {
3065 // Q0 2974 // Q0
3066 __ LoadSImmediate(S0, 1.0); 2975 __ LoadSImmediate(S0, 1.0);
3067 __ vmovs(S1, S0); 2976 __ vmovs(S1, S0);
3068 __ vmovs(S2, S0); 2977 __ vmovs(S2, S0);
3069 __ vmovs(S3, S0); 2978 __ vmovs(S3, S0);
3070 2979
3071 // Q0 2980 // Q0
3072 __ LoadSImmediate(S4, -1.0); 2981 __ LoadSImmediate(S4, -1.0);
3073 __ vmovs(S5, S0); 2982 __ vmovs(S5, S0);
3074 __ vmovs(S6, S0); 2983 __ vmovs(S6, S0);
3075 __ vmovs(S7, S0); 2984 __ vmovs(S7, S0);
3076 2985
3077 // Q1 = Q2 2986 // Q1 = Q2
3078 __ vmovq(Q1, Q0); 2987 __ vmovq(Q1, Q0);
3079 2988
3080 __ vadds(S4, S4, S5); 2989 __ vadds(S4, S4, S5);
3081 __ vadds(S4, S4, S6); 2990 __ vadds(S4, S4, S6);
3082 __ vadds(S4, S4, S7); 2991 __ vadds(S4, S4, S7);
3083 __ vcvtis(S0, S4); 2992 __ vcvtis(S0, S4);
3084 __ vmovrs(R0, S0); 2993 __ vmovrs(R0, S0);
3085
3086 __ bx(LR);
3087 } else {
3088 __ LoadImmediate(R0, 4);
3089 __ bx(LR);
3090 } 2994 }
2995 __ bx(LR);
3091 } 2996 }
3092 2997
3093 2998
3094 ASSEMBLER_TEST_RUN(Vmovq, test) { 2999 ASSEMBLER_TEST_RUN(Vmovq, test) {
3095 EXPECT(test != NULL); 3000 EXPECT(test != NULL);
3096 typedef int (*Tst)() DART_UNUSED; 3001 if (TargetCPUFeatures::neon_supported()) {
3097 EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3002 typedef int (*Tst)() DART_UNUSED;
3003 EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3004 }
3098 } 3005 }
3099 3006
3100 3007
3101 ASSEMBLER_TEST_GENERATE(Vmvnq, assembler) { 3008 ASSEMBLER_TEST_GENERATE(Vmvnq, assembler) {
3102 if (TargetCPUFeatures::neon_supported()) { 3009 if (TargetCPUFeatures::neon_supported()) {
3103 __ LoadImmediate(R1, 42); // R1 <- 42. 3010 __ LoadImmediate(R1, 42); // R1 <- 42.
3104 __ vmovsr(S2, R1); // S2 <- R1. 3011 __ vmovsr(S2, R1); // S2 <- R1.
3105 __ vmvnq(Q1, Q0); // Q1 <- ~Q0. 3012 __ vmvnq(Q1, Q0); // Q1 <- ~Q0.
3106 __ vmvnq(Q2, Q1); // Q2 <- ~Q1. 3013 __ vmvnq(Q2, Q1); // Q2 <- ~Q1.
3107 __ vmovrs(R0, S10); // Now R0 should be 42 again. 3014 __ vmovrs(R0, S10); // Now R0 should be 42 again.
3108 __ bx(LR);
3109 } else {
3110 __ LoadImmediate(R0, 42);
3111 __ bx(LR);
3112 } 3015 }
3016 __ bx(LR);
3113 } 3017 }
3114 3018
3115 3019
3116 ASSEMBLER_TEST_RUN(Vmvnq, test) { 3020 ASSEMBLER_TEST_RUN(Vmvnq, test) {
3117 EXPECT(test != NULL); 3021 EXPECT(test != NULL);
3118 typedef int (*Tst)() DART_UNUSED; 3022 if (TargetCPUFeatures::neon_supported()) {
3119 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3023 typedef int (*Tst)() DART_UNUSED;
3024 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3025 }
3120 } 3026 }
3121 3027
3122 3028
3123 ASSEMBLER_TEST_GENERATE(Vdupb, assembler) { 3029 ASSEMBLER_TEST_GENERATE(Vdupb, assembler) {
3124 if (TargetCPUFeatures::neon_supported()) { 3030 if (TargetCPUFeatures::neon_supported()) {
3125 __ LoadImmediate(R0, 0x00000000); 3031 __ LoadImmediate(R0, 0x00000000);
3126 __ LoadImmediate(R1, 0x00ff0000); 3032 __ LoadImmediate(R1, 0x00ff0000);
3127 __ vmovsr(S4, R0); 3033 __ vmovsr(S4, R0);
3128 __ vmovsr(S5, R1); 3034 __ vmovsr(S5, R1);
3129 3035
3130 // Should copy 0xff to each byte of Q0. 3036 // Should copy 0xff to each byte of Q0.
3131 __ vdup(kByte, Q0, D2, 6); 3037 __ vdup(kByte, Q0, D2, 6);
3132 3038
3133 __ vmovrs(R0, S0); 3039 __ vmovrs(R0, S0);
3134 __ vmovrs(R1, S1); 3040 __ vmovrs(R1, S1);
3135 __ vmovrs(R2, S2); 3041 __ vmovrs(R2, S2);
3136 __ vmovrs(R3, S3); 3042 __ vmovrs(R3, S3);
3137 3043
3138 __ add(R0, R0, Operand(R1)); 3044 __ add(R0, R0, Operand(R1));
3139 __ add(R0, R0, Operand(R2)); 3045 __ add(R0, R0, Operand(R2));
3140 __ add(R0, R0, Operand(R3)); 3046 __ add(R0, R0, Operand(R3));
3141 __ bx(LR);
3142 } else {
3143 __ LoadImmediate(R0, -4);
3144 __ bx(LR);
3145 } 3047 }
3048 __ bx(LR);
3146 } 3049 }
3147 3050
3148 3051
3149 ASSEMBLER_TEST_RUN(Vdupb, test) { 3052 ASSEMBLER_TEST_RUN(Vdupb, test) {
3150 EXPECT(test != NULL); 3053 EXPECT(test != NULL);
3151 typedef int (*Tst)() DART_UNUSED; 3054 if (TargetCPUFeatures::neon_supported()) {
3152 EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3055 typedef int (*Tst)() DART_UNUSED;
3056 EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3057 }
3153 } 3058 }
3154 3059
3155 3060
3156 ASSEMBLER_TEST_GENERATE(Vduph, assembler) { 3061 ASSEMBLER_TEST_GENERATE(Vduph, assembler) {
3157 if (TargetCPUFeatures::neon_supported()) { 3062 if (TargetCPUFeatures::neon_supported()) {
3158 __ LoadImmediate(R0, 0xffff0000); 3063 __ LoadImmediate(R0, 0xffff0000);
3159 __ LoadImmediate(R1, 0x00000000); 3064 __ LoadImmediate(R1, 0x00000000);
3160 __ vmovsr(S4, R0); 3065 __ vmovsr(S4, R0);
3161 __ vmovsr(S5, R1); 3066 __ vmovsr(S5, R1);
3162 3067
3163 // Should copy 0xff to each byte of Q0. 3068 // Should copy 0xff to each byte of Q0.
3164 __ vdup(kHalfword, Q0, D2, 1); 3069 __ vdup(kHalfword, Q0, D2, 1);
3165 3070
3166 __ vmovrs(R0, S0); 3071 __ vmovrs(R0, S0);
3167 __ vmovrs(R1, S1); 3072 __ vmovrs(R1, S1);
3168 __ vmovrs(R2, S2); 3073 __ vmovrs(R2, S2);
3169 __ vmovrs(R3, S3); 3074 __ vmovrs(R3, S3);
3170 3075
3171 __ add(R0, R0, Operand(R1)); 3076 __ add(R0, R0, Operand(R1));
3172 __ add(R0, R0, Operand(R2)); 3077 __ add(R0, R0, Operand(R2));
3173 __ add(R0, R0, Operand(R3)); 3078 __ add(R0, R0, Operand(R3));
3174 __ bx(LR);
3175 } else {
3176 __ LoadImmediate(R0, -4);
3177 __ bx(LR);
3178 } 3079 }
3080 __ bx(LR);
3179 } 3081 }
3180 3082
3181 3083
3182 ASSEMBLER_TEST_RUN(Vduph, test) { 3084 ASSEMBLER_TEST_RUN(Vduph, test) {
3183 EXPECT(test != NULL); 3085 EXPECT(test != NULL);
3184 typedef int (*Tst)() DART_UNUSED; 3086 if (TargetCPUFeatures::neon_supported()) {
3185 EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3087 typedef int (*Tst)() DART_UNUSED;
3088 EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3089 }
3186 } 3090 }
3187 3091
3188 3092
3189 ASSEMBLER_TEST_GENERATE(Vdupw, assembler) { 3093 ASSEMBLER_TEST_GENERATE(Vdupw, assembler) {
3190 if (TargetCPUFeatures::neon_supported()) { 3094 if (TargetCPUFeatures::neon_supported()) {
3191 __ LoadImmediate(R0, 0x00000000); 3095 __ LoadImmediate(R0, 0x00000000);
3192 __ LoadImmediate(R1, 0xffffffff); 3096 __ LoadImmediate(R1, 0xffffffff);
3193 __ vmovsr(S4, R0); 3097 __ vmovsr(S4, R0);
3194 __ vmovsr(S5, R1); 3098 __ vmovsr(S5, R1);
3195 3099
3196 // Should copy 0xff to each byte of Q0. 3100 // Should copy 0xff to each byte of Q0.
3197 __ vdup(kWord, Q0, D2, 1); 3101 __ vdup(kWord, Q0, D2, 1);
3198 3102
3199 __ vmovrs(R0, S0); 3103 __ vmovrs(R0, S0);
3200 __ vmovrs(R1, S1); 3104 __ vmovrs(R1, S1);
3201 __ vmovrs(R2, S2); 3105 __ vmovrs(R2, S2);
3202 __ vmovrs(R3, S3); 3106 __ vmovrs(R3, S3);
3203 3107
3204 __ add(R0, R0, Operand(R1)); 3108 __ add(R0, R0, Operand(R1));
3205 __ add(R0, R0, Operand(R2)); 3109 __ add(R0, R0, Operand(R2));
3206 __ add(R0, R0, Operand(R3)); 3110 __ add(R0, R0, Operand(R3));
3207 __ bx(LR);
3208 } else {
3209 __ LoadImmediate(R0, -4);
3210 __ bx(LR);
3211 } 3111 }
3112 __ bx(LR);
3212 } 3113 }
3213 3114
3214 3115
3215 ASSEMBLER_TEST_RUN(Vdupw, test) { 3116 ASSEMBLER_TEST_RUN(Vdupw, test) {
3216 EXPECT(test != NULL); 3117 EXPECT(test != NULL);
3217 typedef int (*Tst)() DART_UNUSED; 3118 if (TargetCPUFeatures::neon_supported()) {
3218 EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3119 typedef int (*Tst)() DART_UNUSED;
3120 EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3121 }
3219 } 3122 }
3220 3123
3221 3124
3222 ASSEMBLER_TEST_GENERATE(Vzipqw, assembler) { 3125 ASSEMBLER_TEST_GENERATE(Vzipqw, assembler) {
3223 if (TargetCPUFeatures::neon_supported()) { 3126 if (TargetCPUFeatures::neon_supported()) {
3224 __ LoadSImmediate(S0, 0.0); 3127 __ LoadSImmediate(S0, 0.0);
3225 __ LoadSImmediate(S1, 1.0); 3128 __ LoadSImmediate(S1, 1.0);
3226 __ LoadSImmediate(S2, 2.0); 3129 __ LoadSImmediate(S2, 2.0);
3227 __ LoadSImmediate(S3, 3.0); 3130 __ LoadSImmediate(S3, 3.0);
3228 __ LoadSImmediate(S4, 4.0); 3131 __ LoadSImmediate(S4, 4.0);
3229 __ LoadSImmediate(S5, 5.0); 3132 __ LoadSImmediate(S5, 5.0);
3230 __ LoadSImmediate(S6, 6.0); 3133 __ LoadSImmediate(S6, 6.0);
3231 __ LoadSImmediate(S7, 7.0); 3134 __ LoadSImmediate(S7, 7.0);
3232 3135
3233 __ vzipqw(Q0, Q1); 3136 __ vzipqw(Q0, Q1);
3234 3137
3235 __ vsubqs(Q0, Q1, Q0); 3138 __ vsubqs(Q0, Q1, Q0);
3236 3139
3237 __ vadds(S0, S0, S1); 3140 __ vadds(S0, S0, S1);
3238 __ vadds(S0, S0, S2); 3141 __ vadds(S0, S0, S2);
3239 __ vadds(S0, S0, S3); 3142 __ vadds(S0, S0, S3);
3240 __ bx(LR);
3241 } else {
3242 __ LoadSImmediate(S0, 8.0);
3243 __ bx(LR);
3244 } 3143 }
3144 __ bx(LR);
3245 } 3145 }
3246 3146
3247 3147
3248 ASSEMBLER_TEST_RUN(Vzipqw, test) { 3148 ASSEMBLER_TEST_RUN(Vzipqw, test) {
3249 EXPECT(test != NULL); 3149 EXPECT(test != NULL);
3250 typedef float (*Vzipqw)() DART_UNUSED; 3150 if (TargetCPUFeatures::neon_supported()) {
3251 float res = EXECUTE_TEST_CODE_FLOAT(Vzipqw, test->entry()); 3151 typedef float (*Vzipqw)() DART_UNUSED;
3252 EXPECT_FLOAT_EQ(8.0, res, 0.0001f); 3152 float res = EXECUTE_TEST_CODE_FLOAT(Vzipqw, test->entry());
3153 EXPECT_FLOAT_EQ(8.0, res, 0.0001f);
3154 }
3253 } 3155 }
3254 3156
3255 3157
3256 ASSEMBLER_TEST_GENERATE(Vceqqi32, assembler) { 3158 ASSEMBLER_TEST_GENERATE(Vceqqi32, assembler) {
3257 if (TargetCPUFeatures::neon_supported()) { 3159 if (TargetCPUFeatures::neon_supported()) {
3258 __ mov(R0, Operand(1)); 3160 __ mov(R0, Operand(1));
3259 __ vmovsr(S0, R0); 3161 __ vmovsr(S0, R0);
3260 __ mov(R0, Operand(2)); 3162 __ mov(R0, Operand(2));
3261 __ vmovsr(S1, R0); 3163 __ vmovsr(S1, R0);
3262 __ mov(R0, Operand(3)); 3164 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
3275 __ vceqqi(kWord, Q2, Q1, Q0); 3177 __ vceqqi(kWord, Q2, Q1, Q0);
3276 3178
3277 __ vmovrs(R0, S8); 3179 __ vmovrs(R0, S8);
3278 __ vmovrs(R1, S9); 3180 __ vmovrs(R1, S9);
3279 __ vmovrs(R2, S10); 3181 __ vmovrs(R2, S10);
3280 __ vmovrs(R3, S11); 3182 __ vmovrs(R3, S11);
3281 3183
3282 __ add(R0, R0, Operand(R1)); 3184 __ add(R0, R0, Operand(R1));
3283 __ add(R0, R0, Operand(R2)); 3185 __ add(R0, R0, Operand(R2));
3284 __ add(R0, R0, Operand(R3)); 3186 __ add(R0, R0, Operand(R3));
3285 __ bx(LR);
3286 } else {
3287 __ LoadImmediate(R0, -2);
3288 __ bx(LR);
3289 } 3187 }
3188 __ bx(LR);
3290 } 3189 }
3291 3190
3292 3191
3293 ASSEMBLER_TEST_RUN(Vceqqi32, test) { 3192 ASSEMBLER_TEST_RUN(Vceqqi32, test) {
3294 EXPECT(test != NULL); 3193 EXPECT(test != NULL);
3295 typedef int (*Tst)() DART_UNUSED; 3194 if (TargetCPUFeatures::neon_supported()) {
3296 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3195 typedef int (*Tst)() DART_UNUSED;
3196 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3197 }
3297 } 3198 }
3298 3199
3299 3200
3300 ASSEMBLER_TEST_GENERATE(Vceqqs, assembler) { 3201 ASSEMBLER_TEST_GENERATE(Vceqqs, assembler) {
3301 if (TargetCPUFeatures::neon_supported()) { 3202 if (TargetCPUFeatures::neon_supported()) {
3302 __ LoadSImmediate(S0, 1.0); 3203 __ LoadSImmediate(S0, 1.0);
3303 __ LoadSImmediate(S1, 2.0); 3204 __ LoadSImmediate(S1, 2.0);
3304 __ LoadSImmediate(S2, 3.0); 3205 __ LoadSImmediate(S2, 3.0);
3305 __ LoadSImmediate(S3, 4.0); 3206 __ LoadSImmediate(S3, 4.0);
3306 __ LoadSImmediate(S4, 1.0); 3207 __ LoadSImmediate(S4, 1.0);
3307 __ LoadSImmediate(S5, 4.0); 3208 __ LoadSImmediate(S5, 4.0);
3308 __ LoadSImmediate(S6, 3.0); 3209 __ LoadSImmediate(S6, 3.0);
3309 __ LoadSImmediate(S7, 8.0); 3210 __ LoadSImmediate(S7, 8.0);
3310 3211
3311 __ vceqqs(Q2, Q1, Q0); 3212 __ vceqqs(Q2, Q1, Q0);
3312 3213
3313 __ vmovrs(R0, S8); 3214 __ vmovrs(R0, S8);
3314 __ vmovrs(R1, S9); 3215 __ vmovrs(R1, S9);
3315 __ vmovrs(R2, S10); 3216 __ vmovrs(R2, S10);
3316 __ vmovrs(R3, S11); 3217 __ vmovrs(R3, S11);
3317 3218
3318 __ add(R0, R0, Operand(R1)); 3219 __ add(R0, R0, Operand(R1));
3319 __ add(R0, R0, Operand(R2)); 3220 __ add(R0, R0, Operand(R2));
3320 __ add(R0, R0, Operand(R3)); 3221 __ add(R0, R0, Operand(R3));
3321 __ bx(LR);
3322 } else {
3323 __ LoadImmediate(R0, -2);
3324 __ bx(LR);
3325 } 3222 }
3223 __ bx(LR);
3326 } 3224 }
3327 3225
3328 3226
3329 ASSEMBLER_TEST_RUN(Vceqqs, test) { 3227 ASSEMBLER_TEST_RUN(Vceqqs, test) {
3330 EXPECT(test != NULL); 3228 EXPECT(test != NULL);
3331 typedef int (*Tst)() DART_UNUSED; 3229 if (TargetCPUFeatures::neon_supported()) {
3332 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3230 typedef int (*Tst)() DART_UNUSED;
3231 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3232 }
3333 } 3233 }
3334 3234
3335 3235
3336 ASSEMBLER_TEST_GENERATE(Vcgeqi32, assembler) { 3236 ASSEMBLER_TEST_GENERATE(Vcgeqi32, assembler) {
3337 if (TargetCPUFeatures::neon_supported()) { 3237 if (TargetCPUFeatures::neon_supported()) {
3338 __ mov(R0, Operand(1)); 3238 __ mov(R0, Operand(1));
3339 __ vmovsr(S0, R0); 3239 __ vmovsr(S0, R0);
3340 __ mov(R0, Operand(2)); 3240 __ mov(R0, Operand(2));
3341 __ vmovsr(S1, R0); 3241 __ vmovsr(S1, R0);
3342 __ mov(R0, Operand(3)); 3242 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
3355 __ vcgeqi(kWord, Q2, Q1, Q0); 3255 __ vcgeqi(kWord, Q2, Q1, Q0);
3356 3256
3357 __ vmovrs(R0, S8); 3257 __ vmovrs(R0, S8);
3358 __ vmovrs(R1, S9); 3258 __ vmovrs(R1, S9);
3359 __ vmovrs(R2, S10); 3259 __ vmovrs(R2, S10);
3360 __ vmovrs(R3, S11); 3260 __ vmovrs(R3, S11);
3361 3261
3362 __ add(R0, R0, Operand(R1)); 3262 __ add(R0, R0, Operand(R1));
3363 __ add(R0, R0, Operand(R2)); 3263 __ add(R0, R0, Operand(R2));
3364 __ add(R0, R0, Operand(R3)); 3264 __ add(R0, R0, Operand(R3));
3365 __ bx(LR);
3366 } else {
3367 __ LoadImmediate(R0, -2);
3368 __ bx(LR);
3369 } 3265 }
3266 __ bx(LR);
3370 } 3267 }
3371 3268
3372 3269
3373 ASSEMBLER_TEST_RUN(Vcgeqi32, test) { 3270 ASSEMBLER_TEST_RUN(Vcgeqi32, test) {
3374 EXPECT(test != NULL); 3271 EXPECT(test != NULL);
3375 typedef int (*Tst)() DART_UNUSED; 3272 if (TargetCPUFeatures::neon_supported()) {
3376 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3273 typedef int (*Tst)() DART_UNUSED;
3274 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3275 }
3377 } 3276 }
3378 3277
3379 3278
3380 ASSEMBLER_TEST_GENERATE(Vcugeqi32, assembler) { 3279 ASSEMBLER_TEST_GENERATE(Vcugeqi32, assembler) {
3381 if (TargetCPUFeatures::neon_supported()) { 3280 if (TargetCPUFeatures::neon_supported()) {
3382 __ mov(R0, Operand(1)); 3281 __ mov(R0, Operand(1));
3383 __ vmovsr(S0, R0); 3282 __ vmovsr(S0, R0);
3384 __ mov(R0, Operand(2)); 3283 __ mov(R0, Operand(2));
3385 __ vmovsr(S1, R0); 3284 __ vmovsr(S1, R0);
3386 __ mov(R0, Operand(3)); 3285 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
3399 __ vcugeqi(kWord, Q2, Q1, Q0); 3298 __ vcugeqi(kWord, Q2, Q1, Q0);
3400 3299
3401 __ vmovrs(R0, S8); 3300 __ vmovrs(R0, S8);
3402 __ vmovrs(R1, S9); 3301 __ vmovrs(R1, S9);
3403 __ vmovrs(R2, S10); 3302 __ vmovrs(R2, S10);
3404 __ vmovrs(R3, S11); 3303 __ vmovrs(R3, S11);
3405 3304
3406 __ add(R0, R0, Operand(R1)); 3305 __ add(R0, R0, Operand(R1));
3407 __ add(R0, R0, Operand(R2)); 3306 __ add(R0, R0, Operand(R2));
3408 __ add(R0, R0, Operand(R3)); 3307 __ add(R0, R0, Operand(R3));
3409 __ bx(LR);
3410 } else {
3411 __ LoadImmediate(R0, -2);
3412 __ bx(LR);
3413 } 3308 }
3309 __ bx(LR);
3414 } 3310 }
3415 3311
3416 3312
3417 ASSEMBLER_TEST_RUN(Vcugeqi32, test) { 3313 ASSEMBLER_TEST_RUN(Vcugeqi32, test) {
3418 EXPECT(test != NULL); 3314 EXPECT(test != NULL);
3419 typedef int (*Tst)() DART_UNUSED; 3315 if (TargetCPUFeatures::neon_supported()) {
3420 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3316 typedef int (*Tst)() DART_UNUSED;
3317 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3318 }
3421 } 3319 }
3422 3320
3423 3321
3424 ASSEMBLER_TEST_GENERATE(Vcgeqs, assembler) { 3322 ASSEMBLER_TEST_GENERATE(Vcgeqs, assembler) {
3425 if (TargetCPUFeatures::neon_supported()) { 3323 if (TargetCPUFeatures::neon_supported()) {
3426 __ LoadSImmediate(S0, 1.0); 3324 __ LoadSImmediate(S0, 1.0);
3427 __ LoadSImmediate(S1, 2.0); 3325 __ LoadSImmediate(S1, 2.0);
3428 __ LoadSImmediate(S2, 3.0); 3326 __ LoadSImmediate(S2, 3.0);
3429 __ LoadSImmediate(S3, 4.0); 3327 __ LoadSImmediate(S3, 4.0);
3430 __ LoadSImmediate(S4, 1.0); 3328 __ LoadSImmediate(S4, 1.0);
3431 __ LoadSImmediate(S5, 1.0); 3329 __ LoadSImmediate(S5, 1.0);
3432 __ LoadSImmediate(S6, 3.0); 3330 __ LoadSImmediate(S6, 3.0);
3433 __ LoadSImmediate(S7, 1.0); 3331 __ LoadSImmediate(S7, 1.0);
3434 3332
3435 __ vcgeqs(Q2, Q1, Q0); 3333 __ vcgeqs(Q2, Q1, Q0);
3436 3334
3437 __ vmovrs(R0, S8); 3335 __ vmovrs(R0, S8);
3438 __ vmovrs(R1, S9); 3336 __ vmovrs(R1, S9);
3439 __ vmovrs(R2, S10); 3337 __ vmovrs(R2, S10);
3440 __ vmovrs(R3, S11); 3338 __ vmovrs(R3, S11);
3441 3339
3442 __ add(R0, R0, Operand(R1)); 3340 __ add(R0, R0, Operand(R1));
3443 __ add(R0, R0, Operand(R2)); 3341 __ add(R0, R0, Operand(R2));
3444 __ add(R0, R0, Operand(R3)); 3342 __ add(R0, R0, Operand(R3));
3445 __ bx(LR);
3446 } else {
3447 __ LoadImmediate(R0, -2);
3448 __ bx(LR);
3449 } 3343 }
3344 __ bx(LR);
3450 } 3345 }
3451 3346
3452 3347
3453 ASSEMBLER_TEST_RUN(Vcgeqs, test) { 3348 ASSEMBLER_TEST_RUN(Vcgeqs, test) {
3454 EXPECT(test != NULL); 3349 EXPECT(test != NULL);
3455 typedef int (*Tst)() DART_UNUSED; 3350 if (TargetCPUFeatures::neon_supported()) {
3456 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3351 typedef int (*Tst)() DART_UNUSED;
3352 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3353 }
3457 } 3354 }
3458 3355
3459 3356
3460 ASSEMBLER_TEST_GENERATE(Vcgtqi32, assembler) { 3357 ASSEMBLER_TEST_GENERATE(Vcgtqi32, assembler) {
3461 if (TargetCPUFeatures::neon_supported()) { 3358 if (TargetCPUFeatures::neon_supported()) {
3462 __ mov(R0, Operand(1)); 3359 __ mov(R0, Operand(1));
3463 __ vmovsr(S0, R0); 3360 __ vmovsr(S0, R0);
3464 __ mov(R0, Operand(2)); 3361 __ mov(R0, Operand(2));
3465 __ vmovsr(S1, R0); 3362 __ vmovsr(S1, R0);
3466 __ mov(R0, Operand(3)); 3363 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
3479 __ vcgtqi(kWord, Q2, Q1, Q0); 3376 __ vcgtqi(kWord, Q2, Q1, Q0);
3480 3377
3481 __ vmovrs(R0, S8); 3378 __ vmovrs(R0, S8);
3482 __ vmovrs(R1, S9); 3379 __ vmovrs(R1, S9);
3483 __ vmovrs(R2, S10); 3380 __ vmovrs(R2, S10);
3484 __ vmovrs(R3, S11); 3381 __ vmovrs(R3, S11);
3485 3382
3486 __ add(R0, R0, Operand(R1)); 3383 __ add(R0, R0, Operand(R1));
3487 __ add(R0, R0, Operand(R2)); 3384 __ add(R0, R0, Operand(R2));
3488 __ add(R0, R0, Operand(R3)); 3385 __ add(R0, R0, Operand(R3));
3489 __ bx(LR);
3490 } else {
3491 __ LoadImmediate(R0, -2);
3492 __ bx(LR);
3493 } 3386 }
3387 __ bx(LR);
3494 } 3388 }
3495 3389
3496 3390
3497 ASSEMBLER_TEST_RUN(Vcgtqi32, test) { 3391 ASSEMBLER_TEST_RUN(Vcgtqi32, test) {
3498 EXPECT(test != NULL); 3392 EXPECT(test != NULL);
3499 typedef int (*Tst)() DART_UNUSED; 3393 if (TargetCPUFeatures::neon_supported()) {
3500 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3394 typedef int (*Tst)() DART_UNUSED;
3395 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3396 }
3501 } 3397 }
3502 3398
3503 3399
3504 ASSEMBLER_TEST_GENERATE(Vcugtqi32, assembler) { 3400 ASSEMBLER_TEST_GENERATE(Vcugtqi32, assembler) {
3505 if (TargetCPUFeatures::neon_supported()) { 3401 if (TargetCPUFeatures::neon_supported()) {
3506 __ mov(R0, Operand(1)); 3402 __ mov(R0, Operand(1));
3507 __ vmovsr(S0, R0); 3403 __ vmovsr(S0, R0);
3508 __ mov(R0, Operand(2)); 3404 __ mov(R0, Operand(2));
3509 __ vmovsr(S1, R0); 3405 __ vmovsr(S1, R0);
3510 __ mov(R0, Operand(3)); 3406 __ mov(R0, Operand(3));
(...skipping 12 matching lines...) Expand all
3523 __ vcugtqi(kWord, Q2, Q1, Q0); 3419 __ vcugtqi(kWord, Q2, Q1, Q0);
3524 3420
3525 __ vmovrs(R0, S8); 3421 __ vmovrs(R0, S8);
3526 __ vmovrs(R1, S9); 3422 __ vmovrs(R1, S9);
3527 __ vmovrs(R2, S10); 3423 __ vmovrs(R2, S10);
3528 __ vmovrs(R3, S11); 3424 __ vmovrs(R3, S11);
3529 3425
3530 __ add(R0, R0, Operand(R1)); 3426 __ add(R0, R0, Operand(R1));
3531 __ add(R0, R0, Operand(R2)); 3427 __ add(R0, R0, Operand(R2));
3532 __ add(R0, R0, Operand(R3)); 3428 __ add(R0, R0, Operand(R3));
3533 __ bx(LR);
3534 } else {
3535 __ LoadImmediate(R0, -2);
3536 __ bx(LR);
3537 } 3429 }
3430 __ bx(LR);
3538 } 3431 }
3539 3432
3540 3433
3541 ASSEMBLER_TEST_RUN(Vcugtqi32, test) { 3434 ASSEMBLER_TEST_RUN(Vcugtqi32, test) {
3542 EXPECT(test != NULL); 3435 EXPECT(test != NULL);
3543 typedef int (*Tst)() DART_UNUSED; 3436 if (TargetCPUFeatures::neon_supported()) {
3544 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3437 typedef int (*Tst)() DART_UNUSED;
3438 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3439 }
3545 } 3440 }
3546 3441
3547 3442
3548 ASSEMBLER_TEST_GENERATE(Vcgtqs, assembler) { 3443 ASSEMBLER_TEST_GENERATE(Vcgtqs, assembler) {
3549 if (TargetCPUFeatures::neon_supported()) { 3444 if (TargetCPUFeatures::neon_supported()) {
3550 __ LoadSImmediate(S0, 1.0); 3445 __ LoadSImmediate(S0, 1.0);
3551 __ LoadSImmediate(S1, 2.0); 3446 __ LoadSImmediate(S1, 2.0);
3552 __ LoadSImmediate(S2, 3.0); 3447 __ LoadSImmediate(S2, 3.0);
3553 __ LoadSImmediate(S3, 4.0); 3448 __ LoadSImmediate(S3, 4.0);
3554 __ LoadSImmediate(S4, 2.0); 3449 __ LoadSImmediate(S4, 2.0);
3555 __ LoadSImmediate(S5, 1.0); 3450 __ LoadSImmediate(S5, 1.0);
3556 __ LoadSImmediate(S6, 4.0); 3451 __ LoadSImmediate(S6, 4.0);
3557 __ LoadSImmediate(S7, 1.0); 3452 __ LoadSImmediate(S7, 1.0);
3558 3453
3559 __ vcgtqs(Q2, Q1, Q0); 3454 __ vcgtqs(Q2, Q1, Q0);
3560 3455
3561 __ vmovrs(R0, S8); 3456 __ vmovrs(R0, S8);
3562 __ vmovrs(R1, S9); 3457 __ vmovrs(R1, S9);
3563 __ vmovrs(R2, S10); 3458 __ vmovrs(R2, S10);
3564 __ vmovrs(R3, S11); 3459 __ vmovrs(R3, S11);
3565 3460
3566 __ add(R0, R0, Operand(R1)); 3461 __ add(R0, R0, Operand(R1));
3567 __ add(R0, R0, Operand(R2)); 3462 __ add(R0, R0, Operand(R2));
3568 __ add(R0, R0, Operand(R3)); 3463 __ add(R0, R0, Operand(R3));
3569 __ bx(LR);
3570 } else {
3571 __ LoadImmediate(R0, -2);
3572 __ bx(LR);
3573 } 3464 }
3465 __ bx(LR);
3574 } 3466 }
3575 3467
3576 3468
3577 ASSEMBLER_TEST_RUN(Vcgtqs, test) { 3469 ASSEMBLER_TEST_RUN(Vcgtqs, test) {
3578 EXPECT(test != NULL); 3470 EXPECT(test != NULL);
3579 typedef int (*Tst)() DART_UNUSED; 3471 if (TargetCPUFeatures::neon_supported()) {
3580 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3472 typedef int (*Tst)() DART_UNUSED;
3473 EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3474 }
3581 } 3475 }
3582 3476
3583 3477
3584 ASSEMBLER_TEST_GENERATE(Vminqs, assembler) { 3478 ASSEMBLER_TEST_GENERATE(Vminqs, assembler) {
3585 if (TargetCPUFeatures::neon_supported()) { 3479 if (TargetCPUFeatures::neon_supported()) {
3586 __ LoadSImmediate(S0, 1.0); 3480 __ LoadSImmediate(S0, 1.0);
3587 __ LoadSImmediate(S1, 2.0); 3481 __ LoadSImmediate(S1, 2.0);
3588 __ LoadSImmediate(S2, 3.0); 3482 __ LoadSImmediate(S2, 3.0);
3589 __ LoadSImmediate(S3, 4.0); 3483 __ LoadSImmediate(S3, 4.0);
3590 3484
3591 __ LoadSImmediate(S4, 2.0); 3485 __ LoadSImmediate(S4, 2.0);
3592 __ LoadSImmediate(S5, 1.0); 3486 __ LoadSImmediate(S5, 1.0);
3593 __ LoadSImmediate(S6, 6.0); 3487 __ LoadSImmediate(S6, 6.0);
3594 __ LoadSImmediate(S7, 3.0); 3488 __ LoadSImmediate(S7, 3.0);
3595 3489
3596 __ vminqs(Q2, Q1, Q0); 3490 __ vminqs(Q2, Q1, Q0);
3597 3491
3598 __ vadds(S8, S8, S9); 3492 __ vadds(S8, S8, S9);
3599 __ vadds(S8, S8, S10); 3493 __ vadds(S8, S8, S10);
3600 __ vadds(S8, S8, S11); 3494 __ vadds(S8, S8, S11);
3601 3495
3602 __ vcvtis(S0, S8); 3496 __ vcvtis(S0, S8);
3603 __ vmovrs(R0, S0); 3497 __ vmovrs(R0, S0);
3604 __ bx(LR);
3605 } else {
3606 __ LoadImmediate(R0, 8);
3607 __ bx(LR);
3608 } 3498 }
3499 __ bx(LR);
3609 } 3500 }
3610 3501
3611 3502
3612 ASSEMBLER_TEST_RUN(Vminqs, test) { 3503 ASSEMBLER_TEST_RUN(Vminqs, test) {
3613 EXPECT(test != NULL); 3504 EXPECT(test != NULL);
3614 typedef int (*Tst)() DART_UNUSED; 3505 if (TargetCPUFeatures::neon_supported()) {
3615 EXPECT_EQ(8, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3506 typedef int (*Tst)() DART_UNUSED;
3507 EXPECT_EQ(8, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3508 }
3616 } 3509 }
3617 3510
3618 3511
3619 ASSEMBLER_TEST_GENERATE(Vmaxqs, assembler) { 3512 ASSEMBLER_TEST_GENERATE(Vmaxqs, assembler) {
3620 if (TargetCPUFeatures::neon_supported()) { 3513 if (TargetCPUFeatures::neon_supported()) {
3621 __ LoadSImmediate(S0, 1.0); 3514 __ LoadSImmediate(S0, 1.0);
3622 __ LoadSImmediate(S1, 2.0); 3515 __ LoadSImmediate(S1, 2.0);
3623 __ LoadSImmediate(S2, 3.0); 3516 __ LoadSImmediate(S2, 3.0);
3624 __ LoadSImmediate(S3, 4.0); 3517 __ LoadSImmediate(S3, 4.0);
3625 3518
3626 __ LoadSImmediate(S4, 2.0); 3519 __ LoadSImmediate(S4, 2.0);
3627 __ LoadSImmediate(S5, 1.0); 3520 __ LoadSImmediate(S5, 1.0);
3628 __ LoadSImmediate(S6, 6.0); 3521 __ LoadSImmediate(S6, 6.0);
3629 __ LoadSImmediate(S7, 3.0); 3522 __ LoadSImmediate(S7, 3.0);
3630 3523
3631 __ vmaxqs(Q2, Q1, Q0); 3524 __ vmaxqs(Q2, Q1, Q0);
3632 3525
3633 __ vadds(S8, S8, S9); 3526 __ vadds(S8, S8, S9);
3634 __ vadds(S8, S8, S10); 3527 __ vadds(S8, S8, S10);
3635 __ vadds(S8, S8, S11); 3528 __ vadds(S8, S8, S11);
3636 3529
3637 __ vcvtis(S0, S8); 3530 __ vcvtis(S0, S8);
3638 __ vmovrs(R0, S0); 3531 __ vmovrs(R0, S0);
3639 __ bx(LR);
3640 } else {
3641 __ LoadImmediate(R0, 14);
3642 __ bx(LR);
3643 } 3532 }
3533 __ bx(LR);
3644 } 3534 }
3645 3535
3646 3536
3647 ASSEMBLER_TEST_RUN(Vmaxqs, test) { 3537 ASSEMBLER_TEST_RUN(Vmaxqs, test) {
3648 EXPECT(test != NULL); 3538 EXPECT(test != NULL);
3649 typedef int (*Tst)() DART_UNUSED; 3539 if (TargetCPUFeatures::neon_supported()) {
3650 EXPECT_EQ(14, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); 3540 typedef int (*Tst)() DART_UNUSED;
3541 EXPECT_EQ(14, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
3542 }
3651 } 3543 }
3652 3544
3653 3545
3654 // This is the same function as in the Simulator. 3546 // This is the same function as in the Simulator.
3655 static float arm_recip_estimate(float a) { 3547 static float arm_recip_estimate(float a) {
3656 // From the ARM Architecture Reference Manual A2-85. 3548 // From the ARM Architecture Reference Manual A2-85.
3657 if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0; 3549 if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
3658 else if (a == 0.0) return kPosInfinity; 3550 else if (a == 0.0) return kPosInfinity;
3659 else if (isnan(a)) return a; 3551 else if (isnan(a)) return a;
3660 3552
(...skipping 24 matching lines...) Expand all
3685 return bit_cast<float, int32_t>(result_bits); 3577 return bit_cast<float, int32_t>(result_bits);
3686 } 3578 }
3687 3579
3688 3580
3689 ASSEMBLER_TEST_GENERATE(Vrecpeqs, assembler) { 3581 ASSEMBLER_TEST_GENERATE(Vrecpeqs, assembler) {
3690 if (TargetCPUFeatures::neon_supported()) { 3582 if (TargetCPUFeatures::neon_supported()) {
3691 __ LoadSImmediate(S4, 147.0); 3583 __ LoadSImmediate(S4, 147.0);
3692 __ vmovs(S5, S4); 3584 __ vmovs(S5, S4);
3693 __ vmovs(S6, S4); 3585 __ vmovs(S6, S4);
3694 __ vmovs(S7, S4); 3586 __ vmovs(S7, S4);
3695
3696 __ vrecpeqs(Q0, Q1); 3587 __ vrecpeqs(Q0, Q1);
3697
3698 __ bx(LR);
3699 } else {
3700 __ LoadSImmediate(S0, arm_recip_estimate(147.0));
3701 __ bx(LR);
3702 } 3588 }
3589 __ bx(LR);
3703 } 3590 }
3704 3591
3705 3592
3706 ASSEMBLER_TEST_RUN(Vrecpeqs, test) { 3593 ASSEMBLER_TEST_RUN(Vrecpeqs, test) {
3707 EXPECT(test != NULL); 3594 EXPECT(test != NULL);
3708 typedef float (*Vrecpeqs)() DART_UNUSED; 3595 if (TargetCPUFeatures::neon_supported()) {
3709 float res = EXECUTE_TEST_CODE_FLOAT(Vrecpeqs, test->entry()); 3596 typedef float (*Vrecpeqs)() DART_UNUSED;
3710 EXPECT_FLOAT_EQ(arm_recip_estimate(147.0), res, 0.0001f); 3597 float res = EXECUTE_TEST_CODE_FLOAT(Vrecpeqs, test->entry());
3598 EXPECT_FLOAT_EQ(arm_recip_estimate(147.0), res, 0.0001f);
3599 }
3711 } 3600 }
3712 3601
3713 3602
3714 ASSEMBLER_TEST_GENERATE(Vrecpsqs, assembler) { 3603 ASSEMBLER_TEST_GENERATE(Vrecpsqs, assembler) {
3715 if (TargetCPUFeatures::neon_supported()) { 3604 if (TargetCPUFeatures::neon_supported()) {
3716 __ LoadSImmediate(S4, 5.0); 3605 __ LoadSImmediate(S4, 5.0);
3717 __ LoadSImmediate(S5, 2.0); 3606 __ LoadSImmediate(S5, 2.0);
3718 __ LoadSImmediate(S6, 3.0); 3607 __ LoadSImmediate(S6, 3.0);
3719 __ LoadSImmediate(S7, 4.0); 3608 __ LoadSImmediate(S7, 4.0);
3720 3609
3721 __ LoadSImmediate(S8, 10.0); 3610 __ LoadSImmediate(S8, 10.0);
3722 __ LoadSImmediate(S9, 1.0); 3611 __ LoadSImmediate(S9, 1.0);
3723 __ LoadSImmediate(S10, 6.0); 3612 __ LoadSImmediate(S10, 6.0);
3724 __ LoadSImmediate(S11, 3.0); 3613 __ LoadSImmediate(S11, 3.0);
3725 3614
3726 __ vrecpsqs(Q0, Q1, Q2); 3615 __ vrecpsqs(Q0, Q1, Q2);
3727
3728 __ bx(LR);
3729 } else {
3730 __ LoadSImmediate(S0, 2.0 - 10.0 * 5.0);
3731 __ bx(LR);
3732 } 3616 }
3617 __ bx(LR);
3733 } 3618 }
3734 3619
3735 3620
3736 ASSEMBLER_TEST_RUN(Vrecpsqs, test) { 3621 ASSEMBLER_TEST_RUN(Vrecpsqs, test) {
3737 EXPECT(test != NULL); 3622 EXPECT(test != NULL);
3738 typedef float (*Vrecpsqs)() DART_UNUSED; 3623 if (TargetCPUFeatures::neon_supported()) {
3739 float res = EXECUTE_TEST_CODE_FLOAT(Vrecpsqs, test->entry()); 3624 typedef float (*Vrecpsqs)() DART_UNUSED;
3740 EXPECT_FLOAT_EQ(2.0 - 10.0 * 5.0, res, 0.0001f); 3625 float res = EXECUTE_TEST_CODE_FLOAT(Vrecpsqs, test->entry());
3626 EXPECT_FLOAT_EQ(2.0 - 10.0 * 5.0, res, 0.0001f);
3627 }
3741 } 3628 }
3742 3629
3743 3630
3744 ASSEMBLER_TEST_GENERATE(Reciprocal, assembler) { 3631 ASSEMBLER_TEST_GENERATE(Reciprocal, assembler) {
3745 if (TargetCPUFeatures::neon_supported()) { 3632 if (TargetCPUFeatures::neon_supported()) {
3746 __ LoadSImmediate(S4, 147000.0); 3633 __ LoadSImmediate(S4, 147000.0);
3747 __ vmovs(S5, S4); 3634 __ vmovs(S5, S4);
3748 __ vmovs(S6, S4); 3635 __ vmovs(S6, S4);
3749 __ vmovs(S7, S4); 3636 __ vmovs(S7, S4);
3750 3637
3751 // Reciprocal estimate. 3638 // Reciprocal estimate.
3752 __ vrecpeqs(Q0, Q1); 3639 __ vrecpeqs(Q0, Q1);
3753 // 2 Newton-Raphson steps. 3640 // 2 Newton-Raphson steps.
3754 __ vrecpsqs(Q2, Q1, Q0); 3641 __ vrecpsqs(Q2, Q1, Q0);
3755 __ vmulqs(Q0, Q0, Q2); 3642 __ vmulqs(Q0, Q0, Q2);
3756 __ vrecpsqs(Q2, Q1, Q0); 3643 __ vrecpsqs(Q2, Q1, Q0);
3757 __ vmulqs(Q0, Q0, Q2); 3644 __ vmulqs(Q0, Q0, Q2);
3758
3759 __ bx(LR);
3760 } else {
3761 __ LoadSImmediate(S0, 1.0/147000.0);
3762 __ bx(LR);
3763 } 3645 }
3646 __ bx(LR);
3764 } 3647 }
3765 3648
3766 3649
3767 ASSEMBLER_TEST_RUN(Reciprocal, test) { 3650 ASSEMBLER_TEST_RUN(Reciprocal, test) {
3768 EXPECT(test != NULL); 3651 EXPECT(test != NULL);
3769 typedef float (*Reciprocal)() DART_UNUSED; 3652 if (TargetCPUFeatures::neon_supported()) {
3770 float res = EXECUTE_TEST_CODE_FLOAT(Reciprocal, test->entry()); 3653 typedef float (*Reciprocal)() DART_UNUSED;
3771 EXPECT_FLOAT_EQ(1.0/147000.0, res, 0.0001f); 3654 float res = EXECUTE_TEST_CODE_FLOAT(Reciprocal, test->entry());
3655 EXPECT_FLOAT_EQ(1.0/147000.0, res, 0.0001f);
3656 }
3772 } 3657 }
3773 3658
3774 3659
3775 static float arm_reciprocal_sqrt_estimate(float a) { 3660 static float arm_reciprocal_sqrt_estimate(float a) {
3776 // From the ARM Architecture Reference Manual A2-87. 3661 // From the ARM Architecture Reference Manual A2-87.
3777 if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0; 3662 if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
3778 else if (a == 0.0) return kPosInfinity; 3663 else if (a == 0.0) return kPosInfinity;
3779 else if (isnan(a)) return a; 3664 else if (isnan(a)) return a;
3780 3665
3781 uint32_t a_bits = bit_cast<uint32_t, float>(a); 3666 uint32_t a_bits = bit_cast<uint32_t, float>(a);
(...skipping 42 matching lines...) Expand 10 before | Expand all | Expand 10 after
3824 3709
3825 3710
3826 ASSEMBLER_TEST_GENERATE(Vrsqrteqs, assembler) { 3711 ASSEMBLER_TEST_GENERATE(Vrsqrteqs, assembler) {
3827 if (TargetCPUFeatures::neon_supported()) { 3712 if (TargetCPUFeatures::neon_supported()) {
3828 __ LoadSImmediate(S4, 147.0); 3713 __ LoadSImmediate(S4, 147.0);
3829 __ vmovs(S5, S4); 3714 __ vmovs(S5, S4);
3830 __ vmovs(S6, S4); 3715 __ vmovs(S6, S4);
3831 __ vmovs(S7, S4); 3716 __ vmovs(S7, S4);
3832 3717
3833 __ vrsqrteqs(Q0, Q1); 3718 __ vrsqrteqs(Q0, Q1);
3834
3835 __ bx(LR);
3836 } else {
3837 __ LoadSImmediate(S0, arm_reciprocal_sqrt_estimate(147.0));
3838 __ bx(LR);
3839 } 3719 }
3720 __ bx(LR);
3840 } 3721 }
3841 3722
3842 3723
3843 ASSEMBLER_TEST_RUN(Vrsqrteqs, test) { 3724 ASSEMBLER_TEST_RUN(Vrsqrteqs, test) {
3844 EXPECT(test != NULL); 3725 EXPECT(test != NULL);
3845 typedef float (*Vrsqrteqs)() DART_UNUSED; 3726 if (TargetCPUFeatures::neon_supported()) {
3846 float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrteqs, test->entry()); 3727 typedef float (*Vrsqrteqs)() DART_UNUSED;
3847 EXPECT_FLOAT_EQ(arm_reciprocal_sqrt_estimate(147.0), res, 0.0001f); 3728 float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrteqs, test->entry());
3729 EXPECT_FLOAT_EQ(arm_reciprocal_sqrt_estimate(147.0), res, 0.0001f);
3730 }
3848 } 3731 }
3849 3732
3850 3733
3851 ASSEMBLER_TEST_GENERATE(Vrsqrtsqs, assembler) { 3734 ASSEMBLER_TEST_GENERATE(Vrsqrtsqs, assembler) {
3852 if (TargetCPUFeatures::neon_supported()) { 3735 if (TargetCPUFeatures::neon_supported()) {
3853 __ LoadSImmediate(S4, 5.0); 3736 __ LoadSImmediate(S4, 5.0);
3854 __ LoadSImmediate(S5, 2.0); 3737 __ LoadSImmediate(S5, 2.0);
3855 __ LoadSImmediate(S6, 3.0); 3738 __ LoadSImmediate(S6, 3.0);
3856 __ LoadSImmediate(S7, 4.0); 3739 __ LoadSImmediate(S7, 4.0);
3857 3740
3858 __ LoadSImmediate(S8, 10.0); 3741 __ LoadSImmediate(S8, 10.0);
3859 __ LoadSImmediate(S9, 1.0); 3742 __ LoadSImmediate(S9, 1.0);
3860 __ LoadSImmediate(S10, 6.0); 3743 __ LoadSImmediate(S10, 6.0);
3861 __ LoadSImmediate(S11, 3.0); 3744 __ LoadSImmediate(S11, 3.0);
3862 3745
3863 __ vrsqrtsqs(Q0, Q1, Q2); 3746 __ vrsqrtsqs(Q0, Q1, Q2);
3864
3865 __ bx(LR);
3866 } else {
3867 __ LoadSImmediate(S0, (3.0 - 10.0 * 5.0) / 2.0);
3868 __ bx(LR);
3869 } 3747 }
3748 __ bx(LR);
3870 } 3749 }
3871 3750
3872 3751
3873 ASSEMBLER_TEST_RUN(Vrsqrtsqs, test) { 3752 ASSEMBLER_TEST_RUN(Vrsqrtsqs, test) {
3874 EXPECT(test != NULL); 3753 EXPECT(test != NULL);
3875 typedef float (*Vrsqrtsqs)() DART_UNUSED; 3754 if (TargetCPUFeatures::neon_supported()) {
3876 float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrtsqs, test->entry()); 3755 typedef float (*Vrsqrtsqs)() DART_UNUSED;
3877 EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0)/2.0, res, 0.0001f); 3756 float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrtsqs, test->entry());
3757 EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0)/2.0, res, 0.0001f);
3758 }
3878 } 3759 }
3879 3760
3880 3761
3881 ASSEMBLER_TEST_GENERATE(ReciprocalSqrt, assembler) { 3762 ASSEMBLER_TEST_GENERATE(ReciprocalSqrt, assembler) {
3882 if (TargetCPUFeatures::neon_supported()) { 3763 if (TargetCPUFeatures::neon_supported()) {
3883 __ LoadSImmediate(S4, 147000.0); 3764 __ LoadSImmediate(S4, 147000.0);
3884 __ vmovs(S5, S4); 3765 __ vmovs(S5, S4);
3885 __ vmovs(S6, S4); 3766 __ vmovs(S6, S4);
3886 __ vmovs(S7, S4); 3767 __ vmovs(S7, S4);
3887 3768
3888 // Reciprocal square root estimate. 3769 // Reciprocal square root estimate.
3889 __ vrsqrteqs(Q0, Q1); 3770 __ vrsqrteqs(Q0, Q1);
3890 // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2. 3771 // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
3891 // First step. 3772 // First step.
3892 __ vmulqs(Q2, Q0, Q0); // Q2 <- xn^2 3773 __ vmulqs(Q2, Q0, Q0); // Q2 <- xn^2
3893 __ vrsqrtsqs(Q2, Q1, Q2); // Q2 <- (3 - Q1*Q2) / 2. 3774 __ vrsqrtsqs(Q2, Q1, Q2); // Q2 <- (3 - Q1*Q2) / 2.
3894 __ vmulqs(Q0, Q0, Q2); // xn+1 <- xn * Q2 3775 __ vmulqs(Q0, Q0, Q2); // xn+1 <- xn * Q2
3895 // Second step. 3776 // Second step.
3896 __ vmulqs(Q2, Q0, Q0); 3777 __ vmulqs(Q2, Q0, Q0);
3897 __ vrsqrtsqs(Q2, Q1, Q2); 3778 __ vrsqrtsqs(Q2, Q1, Q2);
3898 __ vmulqs(Q0, Q0, Q2); 3779 __ vmulqs(Q0, Q0, Q2);
3899
3900 __ bx(LR);
3901 } else {
3902 __ LoadSImmediate(S0, 1.0/sqrt(147000.0));
3903 __ bx(LR);
3904 } 3780 }
3781 __ bx(LR);
3905 } 3782 }
3906 3783
3907 3784
3908 ASSEMBLER_TEST_RUN(ReciprocalSqrt, test) { 3785 ASSEMBLER_TEST_RUN(ReciprocalSqrt, test) {
3909 EXPECT(test != NULL); 3786 EXPECT(test != NULL);
3910 typedef float (*ReciprocalSqrt)() DART_UNUSED; 3787 if (TargetCPUFeatures::neon_supported()) {
3911 float res = EXECUTE_TEST_CODE_FLOAT(ReciprocalSqrt, test->entry()); 3788 typedef float (*ReciprocalSqrt)() DART_UNUSED;
3912 EXPECT_FLOAT_EQ(1.0/sqrt(147000.0), res, 0.0001f); 3789 float res = EXECUTE_TEST_CODE_FLOAT(ReciprocalSqrt, test->entry());
3790 EXPECT_FLOAT_EQ(1.0/sqrt(147000.0), res, 0.0001f);
3791 }
3913 } 3792 }
3914 3793
3915 3794
3916 ASSEMBLER_TEST_GENERATE(SIMDSqrt, assembler) { 3795 ASSEMBLER_TEST_GENERATE(SIMDSqrt, assembler) {
3917 if (TargetCPUFeatures::neon_supported()) { 3796 if (TargetCPUFeatures::neon_supported()) {
3918 __ LoadSImmediate(S4, 147000.0); 3797 __ LoadSImmediate(S4, 147000.0);
3919 __ vmovs(S5, S4); 3798 __ vmovs(S5, S4);
3920 __ vmovs(S6, S4); 3799 __ vmovs(S6, S4);
3921 __ vmovs(S7, S4); 3800 __ vmovs(S7, S4);
3922 3801
(...skipping 11 matching lines...) Expand all
3934 3813
3935 // Reciprocal. 3814 // Reciprocal.
3936 __ vmovq(Q1, Q0); 3815 __ vmovq(Q1, Q0);
3937 // Reciprocal estimate. 3816 // Reciprocal estimate.
3938 __ vrecpeqs(Q0, Q1); 3817 __ vrecpeqs(Q0, Q1);
3939 // 2 Newton-Raphson steps. 3818 // 2 Newton-Raphson steps.
3940 __ vrecpsqs(Q2, Q1, Q0); 3819 __ vrecpsqs(Q2, Q1, Q0);
3941 __ vmulqs(Q0, Q0, Q2); 3820 __ vmulqs(Q0, Q0, Q2);
3942 __ vrecpsqs(Q2, Q1, Q0); 3821 __ vrecpsqs(Q2, Q1, Q0);
3943 __ vmulqs(Q0, Q0, Q2); 3822 __ vmulqs(Q0, Q0, Q2);
3944
3945 __ bx(LR);
3946 } else {
3947 __ LoadSImmediate(S0, sqrt(147000.0));
3948 __ bx(LR);
3949 } 3823 }
3824 __ bx(LR);
3950 } 3825 }
3951 3826
3952 3827
3953 ASSEMBLER_TEST_RUN(SIMDSqrt, test) { 3828 ASSEMBLER_TEST_RUN(SIMDSqrt, test) {
3954 EXPECT(test != NULL); 3829 EXPECT(test != NULL);
3955 typedef float (*SIMDSqrt)() DART_UNUSED; 3830 if (TargetCPUFeatures::neon_supported()) {
3956 float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt, test->entry()); 3831 typedef float (*SIMDSqrt)() DART_UNUSED;
3957 EXPECT_FLOAT_EQ(sqrt(147000.0), res, 0.0001f); 3832 float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt, test->entry());
3833 EXPECT_FLOAT_EQ(sqrt(147000.0), res, 0.0001f);
3834 }
3958 } 3835 }
3959 3836
3960 3837
3961 ASSEMBLER_TEST_GENERATE(SIMDSqrt2, assembler) { 3838 ASSEMBLER_TEST_GENERATE(SIMDSqrt2, assembler) {
3962 if (TargetCPUFeatures::neon_supported()) { 3839 if (TargetCPUFeatures::neon_supported()) {
3963 __ LoadSImmediate(S4, 1.0); 3840 __ LoadSImmediate(S4, 1.0);
3964 __ LoadSImmediate(S5, 4.0); 3841 __ LoadSImmediate(S5, 4.0);
3965 __ LoadSImmediate(S6, 9.0); 3842 __ LoadSImmediate(S6, 9.0);
3966 __ LoadSImmediate(S7, 16.0); 3843 __ LoadSImmediate(S7, 16.0);
3967 3844
(...skipping 15 matching lines...) Expand all
3983 __ vrecpeqs(Q0, Q1); 3860 __ vrecpeqs(Q0, Q1);
3984 // 2 Newton-Raphson steps. 3861 // 2 Newton-Raphson steps.
3985 __ vrecpsqs(Q2, Q1, Q0); 3862 __ vrecpsqs(Q2, Q1, Q0);
3986 __ vmulqs(Q0, Q0, Q2); 3863 __ vmulqs(Q0, Q0, Q2);
3987 __ vrecpsqs(Q2, Q1, Q0); 3864 __ vrecpsqs(Q2, Q1, Q0);
3988 __ vmulqs(Q0, Q0, Q2); 3865 __ vmulqs(Q0, Q0, Q2);
3989 3866
3990 __ vadds(S0, S0, S1); 3867 __ vadds(S0, S0, S1);
3991 __ vadds(S0, S0, S2); 3868 __ vadds(S0, S0, S2);
3992 __ vadds(S0, S0, S3); 3869 __ vadds(S0, S0, S3);
3993
3994 __ bx(LR);
3995 } else {
3996 __ LoadSImmediate(S0, 10.0);
3997 __ bx(LR);
3998 } 3870 }
3871 __ bx(LR);
3999 } 3872 }
4000 3873
4001 3874
4002 ASSEMBLER_TEST_RUN(SIMDSqrt2, test) { 3875 ASSEMBLER_TEST_RUN(SIMDSqrt2, test) {
4003 EXPECT(test != NULL); 3876 EXPECT(test != NULL);
4004 typedef float (*SIMDSqrt2)() DART_UNUSED; 3877 if (TargetCPUFeatures::neon_supported()) {
4005 float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt2, test->entry()); 3878 typedef float (*SIMDSqrt2)() DART_UNUSED;
4006 EXPECT_FLOAT_EQ(10.0, res, 0.0001f); 3879 float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt2, test->entry());
3880 EXPECT_FLOAT_EQ(10.0, res, 0.0001f);
3881 }
4007 } 3882 }
4008 3883
4009 3884
4010 ASSEMBLER_TEST_GENERATE(SIMDDiv, assembler) { 3885 ASSEMBLER_TEST_GENERATE(SIMDDiv, assembler) {
4011 if (TargetCPUFeatures::neon_supported()) { 3886 if (TargetCPUFeatures::neon_supported()) {
4012 __ LoadSImmediate(S4, 1.0); 3887 __ LoadSImmediate(S4, 1.0);
4013 __ LoadSImmediate(S5, 4.0); 3888 __ LoadSImmediate(S5, 4.0);
4014 __ LoadSImmediate(S6, 9.0); 3889 __ LoadSImmediate(S6, 9.0);
4015 __ LoadSImmediate(S7, 16.0); 3890 __ LoadSImmediate(S7, 16.0);
4016 3891
4017 __ LoadSImmediate(S12, 4.0); 3892 __ LoadSImmediate(S12, 4.0);
4018 __ LoadSImmediate(S13, 16.0); 3893 __ LoadSImmediate(S13, 16.0);
4019 __ LoadSImmediate(S14, 36.0); 3894 __ LoadSImmediate(S14, 36.0);
4020 __ LoadSImmediate(S15, 64.0); 3895 __ LoadSImmediate(S15, 64.0);
4021 3896
4022 // Reciprocal estimate. 3897 // Reciprocal estimate.
4023 __ vrecpeqs(Q0, Q1); 3898 __ vrecpeqs(Q0, Q1);
4024 // 2 Newton-Raphson steps. 3899 // 2 Newton-Raphson steps.
4025 __ vrecpsqs(Q2, Q1, Q0); 3900 __ vrecpsqs(Q2, Q1, Q0);
4026 __ vmulqs(Q0, Q0, Q2); 3901 __ vmulqs(Q0, Q0, Q2);
4027 __ vrecpsqs(Q2, Q1, Q0); 3902 __ vrecpsqs(Q2, Q1, Q0);
4028 __ vmulqs(Q0, Q0, Q2); 3903 __ vmulqs(Q0, Q0, Q2);
4029 3904
4030 __ vmulqs(Q0, Q3, Q0); 3905 __ vmulqs(Q0, Q3, Q0);
4031 __ vadds(S0, S0, S1); 3906 __ vadds(S0, S0, S1);
4032 __ vadds(S0, S0, S2); 3907 __ vadds(S0, S0, S2);
4033 __ vadds(S0, S0, S3); 3908 __ vadds(S0, S0, S3);
4034
4035 __ bx(LR);
4036 } else {
4037 __ LoadSImmediate(S0, 16.0);
4038 __ bx(LR);
4039 } 3909 }
3910 __ bx(LR);
4040 } 3911 }
4041 3912
4042 3913
4043 ASSEMBLER_TEST_RUN(SIMDDiv, test) { 3914 ASSEMBLER_TEST_RUN(SIMDDiv, test) {
4044 EXPECT(test != NULL); 3915 EXPECT(test != NULL);
4045 typedef float (*SIMDDiv)() DART_UNUSED; 3916 if (TargetCPUFeatures::neon_supported()) {
4046 float res = EXECUTE_TEST_CODE_FLOAT(SIMDDiv, test->entry()); 3917 typedef float (*SIMDDiv)() DART_UNUSED;
4047 EXPECT_FLOAT_EQ(16.0, res, 0.0001f); 3918 float res = EXECUTE_TEST_CODE_FLOAT(SIMDDiv, test->entry());
3919 EXPECT_FLOAT_EQ(16.0, res, 0.0001f);
3920 }
4048 } 3921 }
4049 3922
4050 3923
4051 ASSEMBLER_TEST_GENERATE(Vabsqs, assembler) { 3924 ASSEMBLER_TEST_GENERATE(Vabsqs, assembler) {
4052 if (TargetCPUFeatures::neon_supported()) { 3925 if (TargetCPUFeatures::neon_supported()) {
4053 __ LoadSImmediate(S4, 1.0); 3926 __ LoadSImmediate(S4, 1.0);
4054 __ LoadSImmediate(S5, -1.0); 3927 __ LoadSImmediate(S5, -1.0);
4055 __ LoadSImmediate(S6, 1.0); 3928 __ LoadSImmediate(S6, 1.0);
4056 __ LoadSImmediate(S7, -1.0); 3929 __ LoadSImmediate(S7, -1.0);
4057 3930
4058 __ vabsqs(Q0, Q1); 3931 __ vabsqs(Q0, Q1);
4059 3932
4060 __ vadds(S0, S0, S1); 3933 __ vadds(S0, S0, S1);
4061 __ vadds(S0, S0, S2); 3934 __ vadds(S0, S0, S2);
4062 __ vadds(S0, S0, S3); 3935 __ vadds(S0, S0, S3);
4063
4064 __ bx(LR);
4065 } else {
4066 __ LoadSImmediate(S0, 4.0);
4067 __ bx(LR);
4068 } 3936 }
3937 __ bx(LR);
4069 } 3938 }
4070 3939
4071 3940
4072 ASSEMBLER_TEST_RUN(Vabsqs, test) { 3941 ASSEMBLER_TEST_RUN(Vabsqs, test) {
4073 EXPECT(test != NULL); 3942 EXPECT(test != NULL);
4074 typedef float (*Vabsqs)() DART_UNUSED; 3943 if (TargetCPUFeatures::neon_supported()) {
4075 float res = EXECUTE_TEST_CODE_FLOAT(Vabsqs, test->entry()); 3944 typedef float (*Vabsqs)() DART_UNUSED;
4076 EXPECT_FLOAT_EQ(4.0, res, 0.0001f); 3945 float res = EXECUTE_TEST_CODE_FLOAT(Vabsqs, test->entry());
3946 EXPECT_FLOAT_EQ(4.0, res, 0.0001f);
3947 }
4077 } 3948 }
4078 3949
4079 3950
4080 ASSEMBLER_TEST_GENERATE(Vnegqs, assembler) { 3951 ASSEMBLER_TEST_GENERATE(Vnegqs, assembler) {
4081 if (TargetCPUFeatures::neon_supported()) { 3952 if (TargetCPUFeatures::neon_supported()) {
4082 __ LoadSImmediate(S4, 1.0); 3953 __ LoadSImmediate(S4, 1.0);
4083 __ LoadSImmediate(S5, -2.0); 3954 __ LoadSImmediate(S5, -2.0);
4084 __ LoadSImmediate(S6, 1.0); 3955 __ LoadSImmediate(S6, 1.0);
4085 __ LoadSImmediate(S7, -2.0); 3956 __ LoadSImmediate(S7, -2.0);
4086 3957
4087 __ vnegqs(Q0, Q1); 3958 __ vnegqs(Q0, Q1);
4088 3959
4089 __ vadds(S0, S0, S1); 3960 __ vadds(S0, S0, S1);
4090 __ vadds(S0, S0, S2); 3961 __ vadds(S0, S0, S2);
4091 __ vadds(S0, S0, S3); 3962 __ vadds(S0, S0, S3);
4092
4093 __ bx(LR);
4094 } else {
4095 __ LoadSImmediate(S0, 2.0);
4096 __ bx(LR);
4097 } 3963 }
3964 __ bx(LR);
4098 } 3965 }
4099 3966
4100 3967
4101 ASSEMBLER_TEST_RUN(Vnegqs, test) { 3968 ASSEMBLER_TEST_RUN(Vnegqs, test) {
4102 EXPECT(test != NULL); 3969 EXPECT(test != NULL);
4103 typedef float (*Vnegqs)() DART_UNUSED; 3970 if (TargetCPUFeatures::neon_supported()) {
4104 float res = EXECUTE_TEST_CODE_FLOAT(Vnegqs, test->entry()); 3971 typedef float (*Vnegqs)() DART_UNUSED;
4105 EXPECT_FLOAT_EQ(2.0, res, 0.0001f); 3972 float res = EXECUTE_TEST_CODE_FLOAT(Vnegqs, test->entry());
4106 } 3973 EXPECT_FLOAT_EQ(2.0, res, 0.0001f);
4107 3974 }
4108
4109 ASSEMBLER_TEST_GENERATE(MultCheckOverflow, assembler) {
4110 // Both positive, no overflow
4111 Label overflow1, test1;
4112 __ LoadImmediate(R0, 42);
4113 __ LoadImmediate(R1, 0xff);
4114 __ LoadImmediate(R2, 0xf0);
4115 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow1);
4116 __ b(&test1);
4117 __ Bind(&overflow1);
4118 __ LoadImmediate(R0, 1);
4119 __ Ret();
4120
4121
4122 // Left negative no overflow.
4123 __ Bind(&test1);
4124 Label overflow2, test2;
4125 __ LoadImmediate(R1, -0xff);
4126 __ LoadImmediate(R2, 0xf0);
4127 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow2);
4128 __ b(&test2);
4129 __ Bind(&overflow2);
4130 __ LoadImmediate(R0, 2);
4131 __ Ret();
4132
4133 // Right negative no overflow
4134 Label overflow3, test3;
4135 __ Bind(&test2);
4136 __ LoadImmediate(R1, 0xff);
4137 __ LoadImmediate(R2, -0xf0);
4138 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow3);
4139 __ b(&test3);
4140 __ Bind(&overflow3);
4141 __ LoadImmediate(R0, 3);
4142 __ Ret();
4143
4144 // Both negative no overflow.
4145 Label overflow4, test4;
4146 __ Bind(&test3);
4147 __ LoadImmediate(R1, -0xff);
4148 __ LoadImmediate(R2, -0xf0);
4149 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow4);
4150 __ b(&test4);
4151 __ Bind(&overflow4);
4152 __ LoadImmediate(R0, 4);
4153 __ Ret();
4154
4155 // Both positive with overflow.
4156 Label test5;
4157 __ Bind(&test4);
4158 __ LoadImmediate(R1, 0x0fffffff);
4159 __ LoadImmediate(R2, 0xffff);
4160 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test5);
4161 __ LoadImmediate(R0, 5);
4162 __ Ret();
4163
4164 // left negative with overflow.
4165 Label test6;
4166 __ Bind(&test5);
4167 __ LoadImmediate(R1, -0x0fffffff);
4168 __ LoadImmediate(R2, 0xffff);
4169 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test6);
4170 __ LoadImmediate(R0, 6);
4171 __ Ret();
4172
4173 // right negative with overflow.
4174 Label test7;
4175 __ Bind(&test6);
4176 __ LoadImmediate(R1, 0x0fffffff);
4177 __ LoadImmediate(R2, -0xffff);
4178 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test7);
4179 __ LoadImmediate(R0, 7);
4180 __ Ret();
4181
4182 // both negative with overflow.
4183 Label test8;
4184 __ Bind(&test7);
4185 __ LoadImmediate(R1, -0x0fffffff);
4186 __ LoadImmediate(R2, -0xffff);
4187 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test8);
4188 __ LoadImmediate(R0, 8);
4189 __ Ret();
4190
4191 __ Bind(&test8);
4192 __ Ret();
4193 }
4194
4195
4196 ASSEMBLER_TEST_RUN(MultCheckOverflow, test) {
4197 EXPECT(test != NULL);
4198 typedef int (*Tst)() DART_UNUSED;
4199 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
4200 } 3975 }
4201 3976
4202 3977
4203 // Called from assembler_test.cc. 3978 // Called from assembler_test.cc.
4204 // LR: return address. 3979 // LR: return address.
4205 // R0: context. 3980 // R0: context.
4206 // R1: value. 3981 // R1: value.
4207 // R2: growable array. 3982 // R2: growable array.
4208 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) { 3983 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) {
4209 __ PushList((1 << CTX) | (1 << LR)); 3984 __ PushList((1 << CTX) | (1 << LR));
(...skipping 50 matching lines...) Expand 10 before | Expand all | Expand 10 after
4260 EXPECT_EQ(ICData::kInt64RangeBit, 4035 EXPECT_EQ(ICData::kInt64RangeBit,
4261 RANGE_OF(Integer::New(static_cast<int64_t>(kMinInt32) - 1))); 4036 RANGE_OF(Integer::New(static_cast<int64_t>(kMinInt32) - 1)));
4262 EXPECT_EQ(ICData::kInt64RangeBit, RANGE_OF(Integer::New(kMaxInt64))); 4037 EXPECT_EQ(ICData::kInt64RangeBit, RANGE_OF(Integer::New(kMaxInt64)));
4263 EXPECT_EQ(ICData::kInt64RangeBit, RANGE_OF(Integer::New(kMinInt64))); 4038 EXPECT_EQ(ICData::kInt64RangeBit, RANGE_OF(Integer::New(kMinInt64)));
4264 4039
4265 EXPECT_EQ(-1, RANGE_OF(Bool::True().raw())); 4040 EXPECT_EQ(-1, RANGE_OF(Bool::True().raw()));
4266 4041
4267 #undef RANGE_OF 4042 #undef RANGE_OF
4268 } 4043 }
4269 4044
4270
4271 } // namespace dart 4045 } // namespace dart
4272 4046
4273 #endif // defined TARGET_ARCH_ARM 4047 #endif // defined TARGET_ARCH_ARM
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