A few fixes for ARMv5TE.

runtime/vm/assembler_arm_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/os.h"
@@ skipping 437 matching lines @@
               EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
                                         DBL_MAX));
   } else {
     typedef int (*DoubleToIntConversion)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleToIntConversion, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(FloatToDoubleConversion, assembler) {
-  __ LoadSImmediate(S2, 12.8f);
-  __ vcvtds(D0, S2);
+  if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S2, 12.8f);
+    __ vcvtds(D0, S2);
+  } else {
+    __ LoadImmediate(R0, 0);
+  }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(FloatToDoubleConversion, test) {
-  typedef double (*FloatToDoubleConversionCode)() DART_UNUSED;
-  EXPECT(test != NULL);
-  double res = EXECUTE_TEST_CODE_DOUBLE(FloatToDoubleConversionCode,
-                                        test->entry());
-  EXPECT_FLOAT_EQ(12.8, res, 0.001);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef double (*FloatToDoubleConversionCode)() DART_UNUSED;
+    EXPECT(test != NULL);
+    double res = EXECUTE_TEST_CODE_DOUBLE(FloatToDoubleConversionCode,
+                                          test->entry());
+    EXPECT_FLOAT_EQ(12.8, res, 0.001);
+  } else {

[srdjan, 2015/03/30 17:39:50]

Maybe you just want to do nothing instead of running dummy code?

[zra, 2015/03/30 20:02:05]

Changed here, and used the same pattern for all neon, vfp, and division tests.

+    typedef int (*FloatToDoubleConversionCode)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(FloatToDoubleConversionCode,
+                                         test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleToFloatConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadDImmediate(D1, 12.8, R0);
     __ vcvtsd(S0, D1);
   } else {
     __ LoadImmediate(R0, 0);
   }
@@ skipping 452 matching lines @@
 ASSEMBLER_TEST_RUN(Multiply64To64, test) {
   EXPECT(test != NULL);
   typedef int64_t (*Multiply64To64)
       (int64_t operand0, int64_t operand1) DART_UNUSED;
   EXPECT_EQ(6,
             EXECUTE_TEST_CODE_INT64_LL(Multiply64To64, test->entry(), -3, -2));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Multiply32To64, assembler) {
-#if defined(USING_SIMULATOR)
-  const ARMVersion version = TargetCPUFeatures::arm_version();
-  HostCPUFeatures::set_arm_version(ARMv7);
-#endif
-  if (TargetCPUFeatures::arm_version() == ARMv7) {
-    __ smull(R0, R1, R0, R2);
-  } else {
-    __ LoadImmediate(R0, 6);
-    __ LoadImmediate(R1, 0);
-  }
+  __ smull(R0, R1, R0, R2);
   __ bx(LR);
-#if defined(USING_SIMULATOR)
-  HostCPUFeatures::set_arm_version(version);
-#endif
 }
 
 
 ASSEMBLER_TEST_RUN(Multiply32To64, test) {
   EXPECT(test != NULL);
   typedef int64_t (*Multiply32To64)
       (int64_t operand0, int64_t operand1) DART_UNUSED;
   EXPECT_EQ(6,
             EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2));
 }
@@ skipping 301 matching lines @@
 
 ASSEMBLER_TEST_RUN(Ldrh1, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0xff, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldrd, assembler) {
   __ mov(IP, Operand(SP));
-  __ strd(R2, Address(SP, (-kWordSize * 30), Address::PreIndex));
-  __ strd(R0, Address(IP, (-kWordSize * 28)));
-  __ ldrd(R2, Address(IP, (-kWordSize * 28)));
-  __ ldrd(R0, Address(SP, (kWordSize * 30), Address::PostIndex));
+  __ sub(SP, SP, Operand(kWordSize*30));
+  __ strd(R2, SP, 0);
+  __ strd(R0, IP, (-kWordSize*28));
+  __ ldrd(R2, IP, (-kWordSize*28));
+  __ ldrd(R0, SP, 0);
+  __ add(SP, SP, Operand(kWordSize*30));
   __ sub(R0, R0, Operand(R2));
   __ add(R1, R1, Operand(R3));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldrd, test) {
   EXPECT(test != NULL);
   typedef int64_t (*Tst)(int64_t r0r1, int64_t r2r3) DART_UNUSED;
   EXPECT_EQ(0x0000444400002222LL, EXECUTE_TEST_CODE_INT64_LL(
@@ skipping 611 matching lines @@
 ASSEMBLER_TEST_GENERATE(IntDiv_supported, assembler) {
 #if defined(USING_SIMULATOR)
   bool orig = TargetCPUFeatures::integer_division_supported();
   HostCPUFeatures::set_integer_division_supported(true);
   __ mov(R0, Operand(27));
   __ mov(R1, Operand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
   HostCPUFeatures::set_integer_division_supported(orig);
   __ bx(LR);
 #else
-  __ mov(R0, Operand(27));
-  __ mov(R1, Operand(9));
-  __ IntegerDivide(R0, R0, R1, D0, D1);
+  if (TargetCPUFeatures::can_divide()) {
+    __ mov(R0, Operand(27));
+    __ mov(R1, Operand(9));
+    __ IntegerDivide(R0, R0, R1, D0, D1);
+  } else {
+    __ LoadImmediate(R0, 3);

[srdjan, 2015/03/30 17:39:50]

ditto

[zra, 2015/03/30 20:02:05]

Done.

+  }
   __ bx(LR);
 #endif
 }
 
 
 ASSEMBLER_TEST_RUN(IntDiv_supported, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(IntDiv_unsupported, assembler) {
 #if defined(USING_SIMULATOR)
   bool orig = TargetCPUFeatures::integer_division_supported();
   HostCPUFeatures::set_integer_division_supported(false);
   __ mov(R0, Operand(27));
   __ mov(R1, Operand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
   HostCPUFeatures::set_integer_division_supported(orig);
   __ bx(LR);
 #else
-  __ mov(R0, Operand(27));
-  __ mov(R1, Operand(9));
-  __ IntegerDivide(R0, R0, R1, D0, D1);
+  if (TargetCPUFeatures::can_divide()) {
+    __ mov(R0, Operand(27));
+    __ mov(R1, Operand(9));
+    __ IntegerDivide(R0, R0, R1, D0, D1);
+  } else {
+    __ LoadImmediate(R0, 3);

[srdjan, 2015/03/30 17:39:50]

ditto

[zra, 2015/03/30 20:02:05]

Done.

+  }
   __ bx(LR);
 #endif
 }
 
 
 ASSEMBLER_TEST_RUN(IntDiv_unsupported, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
@@ skipping 1263 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vdupw, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vzipqw, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 0.0);
     __ LoadSImmediate(S1, 1.0);
     __ LoadSImmediate(S2, 2.0);
     __ LoadSImmediate(S3, 3.0);
     __ LoadSImmediate(S4, 4.0);
     __ LoadSImmediate(S5, 5.0);
     __ LoadSImmediate(S6, 6.0);
     __ LoadSImmediate(S7, 7.0);
 
     __ vzipqw(Q0, Q1);
 
     __ vsubqs(Q0, Q1, Q0);
 
     __ vadds(S0, S0, S1);
     __ vadds(S0, S0, S2);
     __ vadds(S0, S0, S3);
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, 8.0);
   } else {
-    __ LoadSImmediate(S0, 8.0);
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vzipqw, test) {
   EXPECT(test != NULL);
-  typedef float (*Vzipqw)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(Vzipqw, test->entry());
-  EXPECT_FLOAT_EQ(8.0, res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*Vzipqw)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(Vzipqw, test->entry());
+    EXPECT_FLOAT_EQ(8.0, res, 0.0001f);

[srdjan, 2015/03/30 17:39:50]

ditto

[zra, 2015/03/30 20:02:05]

Done.

+  } else {
+    typedef int (*Vzipqw)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Vzipqw, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vceqqi32, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, Operand(3));
@@ skipping 417 matching lines @@
 
   // result = sign : result_exp<7:0> : estimate<51:29>
   int32_t result_bits =
       (a_bits & 0x80000000) | ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrecpeqs, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
-
     __ vrecpeqs(Q0, Q1);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, arm_recip_estimate(147.0));
   } else {
-    __ LoadSImmediate(S0, arm_recip_estimate(147.0));
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vrecpeqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vrecpeqs)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(Vrecpeqs, test->entry());
-  EXPECT_FLOAT_EQ(arm_recip_estimate(147.0), res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*Vrecpeqs)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(Vrecpeqs, test->entry());
+    EXPECT_FLOAT_EQ(arm_recip_estimate(147.0), res, 0.0001f);
+  } else {
+    typedef int (*Vrecpeqs)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Vrecpeqs, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrecpsqs, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 5.0);
     __ LoadSImmediate(S5, 2.0);
     __ LoadSImmediate(S6, 3.0);
     __ LoadSImmediate(S7, 4.0);
 
     __ LoadSImmediate(S8, 10.0);
     __ LoadSImmediate(S9, 1.0);
     __ LoadSImmediate(S10, 6.0);
     __ LoadSImmediate(S11, 3.0);
 
     __ vrecpsqs(Q0, Q1, Q2);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, 2.0 - 10.0 * 5.0);
   } else {
-    __ LoadSImmediate(S0, 2.0 - 10.0 * 5.0);
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vrecpsqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vrecpsqs)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(Vrecpsqs, test->entry());
-  EXPECT_FLOAT_EQ(2.0 - 10.0 * 5.0, res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*Vrecpsqs)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(Vrecpsqs, test->entry());
+    EXPECT_FLOAT_EQ(2.0 - 10.0 * 5.0, res, 0.0001f);
+  } else {
+    typedef int (*Vrecpsqs)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Vrecpsqs, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Reciprocal, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     // Reciprocal estimate.
     __ vrecpeqs(Q0, Q1);
     // 2 Newton-Raphson steps.
     __ vrecpsqs(Q2, Q1, Q0);
     __ vmulqs(Q0, Q0, Q2);
     __ vrecpsqs(Q2, Q1, Q0);
     __ vmulqs(Q0, Q0, Q2);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, 1.0/147000.0);
   } else {
-    __ LoadSImmediate(S0, 1.0/147000.0);
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Reciprocal, test) {
   EXPECT(test != NULL);
-  typedef float (*Reciprocal)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(Reciprocal, test->entry());
-  EXPECT_FLOAT_EQ(1.0/147000.0, res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*Reciprocal)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(Reciprocal, test->entry());
+    EXPECT_FLOAT_EQ(1.0/147000.0, res, 0.0001f);
+  } else {
+    typedef int (*Reciprocal)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Reciprocal, test->entry()));
+  }
 }
 
 
 static float arm_reciprocal_sqrt_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-87.
   if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
   else if (a == 0.0) return kPosInfinity;
   else if (isnan(a)) return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
@@ skipping 35 matching lines @@
   ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
 
   // result = 0 : result_exp<7:0> : estimate<51:29>
   int32_t result_bits = ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrsqrteqs, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     __ vrsqrteqs(Q0, Q1);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, arm_reciprocal_sqrt_estimate(147.0));
   } else {
-    __ LoadSImmediate(S0, arm_reciprocal_sqrt_estimate(147.0));
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vrsqrteqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vrsqrteqs)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrteqs, test->entry());
-  EXPECT_FLOAT_EQ(arm_reciprocal_sqrt_estimate(147.0), res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*Vrsqrteqs)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrteqs, test->entry());
+    EXPECT_FLOAT_EQ(arm_reciprocal_sqrt_estimate(147.0), res, 0.0001f);
+  } else {
+    typedef int (*Vrsqrteqs)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Vrsqrteqs, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrsqrtsqs, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 5.0);
     __ LoadSImmediate(S5, 2.0);
     __ LoadSImmediate(S6, 3.0);
     __ LoadSImmediate(S7, 4.0);
 
     __ LoadSImmediate(S8, 10.0);
     __ LoadSImmediate(S9, 1.0);
     __ LoadSImmediate(S10, 6.0);
     __ LoadSImmediate(S11, 3.0);
 
     __ vrsqrtsqs(Q0, Q1, Q2);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, (3.0 - 10.0 * 5.0) / 2.0);
   } else {
-    __ LoadSImmediate(S0, (3.0 - 10.0 * 5.0) / 2.0);
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vrsqrtsqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vrsqrtsqs)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrtsqs, test->entry());
-  EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0)/2.0, res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*Vrsqrtsqs)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrtsqs, test->entry());
+    EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0)/2.0, res, 0.0001f);
+  } else {
+    typedef int (*Vrsqrtsqs)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Vrsqrtsqs, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(ReciprocalSqrt, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     // Reciprocal square root estimate.
     __ vrsqrteqs(Q0, Q1);
     // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
     // First step.
     __ vmulqs(Q2, Q0, Q0);  // Q2 <- xn^2
     __ vrsqrtsqs(Q2, Q1, Q2);  // Q2 <- (3 - Q1*Q2) / 2.
     __ vmulqs(Q0, Q0, Q2);  // xn+1 <- xn * Q2
     // Second step.
     __ vmulqs(Q2, Q0, Q0);
     __ vrsqrtsqs(Q2, Q1, Q2);
     __ vmulqs(Q0, Q0, Q2);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, 1.0/sqrt(147000.0));
   } else {
-    __ LoadSImmediate(S0, 1.0/sqrt(147000.0));
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(ReciprocalSqrt, test) {
   EXPECT(test != NULL);
-  typedef float (*ReciprocalSqrt)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(ReciprocalSqrt, test->entry());
-  EXPECT_FLOAT_EQ(1.0/sqrt(147000.0), res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*ReciprocalSqrt)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(ReciprocalSqrt, test->entry());
+    EXPECT_FLOAT_EQ(1.0/sqrt(147000.0), res, 0.0001f);
+  } else {
+    typedef int (*ReciprocalSqrt)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(ReciprocalSqrt, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDSqrt, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     // Reciprocal square root estimate.
     __ vrsqrteqs(Q0, Q1);
     // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
     // First step.
     __ vmulqs(Q2, Q0, Q0);  // Q2 <- xn^2
     __ vrsqrtsqs(Q2, Q1, Q2);  // Q2 <- (3 - Q1*Q2) / 2.
     __ vmulqs(Q0, Q0, Q2);  // xn+1 <- xn * Q2
     // Second step.
     __ vmulqs(Q2, Q0, Q0);
     __ vrsqrtsqs(Q2, Q1, Q2);
     __ vmulqs(Q0, Q0, Q2);
 
     // Reciprocal.
     __ vmovq(Q1, Q0);
     // Reciprocal estimate.
     __ vrecpeqs(Q0, Q1);
     // 2 Newton-Raphson steps.
     __ vrecpsqs(Q2, Q1, Q0);
     __ vmulqs(Q0, Q0, Q2);
     __ vrecpsqs(Q2, Q1, Q0);
     __ vmulqs(Q0, Q0, Q2);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, sqrt(147000.0));
   } else {
-    __ LoadSImmediate(S0, sqrt(147000.0));
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SIMDSqrt, test) {
   EXPECT(test != NULL);
-  typedef float (*SIMDSqrt)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt, test->entry());
-  EXPECT_FLOAT_EQ(sqrt(147000.0), res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*SIMDSqrt)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt, test->entry());
+    EXPECT_FLOAT_EQ(sqrt(147000.0), res, 0.0001f);
+  } else {
+    typedef int (*SIMDSqrt)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SIMDSqrt, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDSqrt2, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 4.0);
     __ LoadSImmediate(S6, 9.0);
     __ LoadSImmediate(S7, 16.0);
 
     // Reciprocal square root estimate.
     __ vrsqrteqs(Q0, Q1);
     // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
     // First step.
     __ vmulqs(Q2, Q0, Q0);  // Q2 <- xn^2
@@ skipping 10 matching lines @@
     __ vrecpeqs(Q0, Q1);
     // 2 Newton-Raphson steps.
     __ vrecpsqs(Q2, Q1, Q0);
     __ vmulqs(Q0, Q0, Q2);
     __ vrecpsqs(Q2, Q1, Q0);
     __ vmulqs(Q0, Q0, Q2);
 
     __ vadds(S0, S0, S1);
     __ vadds(S0, S0, S2);
     __ vadds(S0, S0, S3);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, 10.0);
   } else {
-    __ LoadSImmediate(S0, 10.0);
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SIMDSqrt2, test) {
   EXPECT(test != NULL);
-  typedef float (*SIMDSqrt2)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt2, test->entry());
-  EXPECT_FLOAT_EQ(10.0, res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*SIMDSqrt2)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt2, test->entry());
+    EXPECT_FLOAT_EQ(10.0, res, 0.0001f);
+  } else {
+    typedef int (*SIMDSqrt2)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SIMDSqrt2, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDDiv, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 4.0);
     __ LoadSImmediate(S6, 9.0);
     __ LoadSImmediate(S7, 16.0);
 
     __ LoadSImmediate(S12, 4.0);
     __ LoadSImmediate(S13, 16.0);
     __ LoadSImmediate(S14, 36.0);
     __ LoadSImmediate(S15, 64.0);
 
     // Reciprocal estimate.
     __ vrecpeqs(Q0, Q1);
     // 2 Newton-Raphson steps.
     __ vrecpsqs(Q2, Q1, Q0);
     __ vmulqs(Q0, Q0, Q2);
     __ vrecpsqs(Q2, Q1, Q0);
     __ vmulqs(Q0, Q0, Q2);
 
     __ vmulqs(Q0, Q3, Q0);
     __ vadds(S0, S0, S1);
     __ vadds(S0, S0, S2);
     __ vadds(S0, S0, S3);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, 16.0);
   } else {
-    __ LoadSImmediate(S0, 16.0);
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SIMDDiv, test) {
   EXPECT(test != NULL);
-  typedef float (*SIMDDiv)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(SIMDDiv, test->entry());
-  EXPECT_FLOAT_EQ(16.0, res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*SIMDDiv)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(SIMDDiv, test->entry());
+    EXPECT_FLOAT_EQ(16.0, res, 0.0001f);
+  } else {
+    typedef int (*SIMDDiv)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SIMDDiv, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vabsqs, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, -1.0);
     __ LoadSImmediate(S6, 1.0);
     __ LoadSImmediate(S7, -1.0);
 
     __ vabsqs(Q0, Q1);
 
     __ vadds(S0, S0, S1);
     __ vadds(S0, S0, S2);
     __ vadds(S0, S0, S3);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, 4.0);
   } else {
-    __ LoadSImmediate(S0, 4.0);
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vabsqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vabsqs)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(Vabsqs, test->entry());
-  EXPECT_FLOAT_EQ(4.0, res, 0.0001f);
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*Vabsqs)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(Vabsqs, test->entry());
+    EXPECT_FLOAT_EQ(4.0, res, 0.0001f);
+  } else {
+    typedef int (*SIMDDiv)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SIMDDiv, test->entry()));
+  }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vnegqs, assembler) {
-  if (TargetCPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::vfp_supported() &&
+      TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, -2.0);
     __ LoadSImmediate(S6, 1.0);
     __ LoadSImmediate(S7, -2.0);
 
     __ vnegqs(Q0, Q1);
 
     __ vadds(S0, S0, S1);
     __ vadds(S0, S0, S2);
     __ vadds(S0, S0, S3);
-
-    __ bx(LR);
+  } else if (TargetCPUFeatures::vfp_supported()) {
+    __ LoadSImmediate(S0, 2.0);
   } else {
-    __ LoadSImmediate(S0, 2.0);
-    __ bx(LR);
+    __ LoadImmediate(R0, 0);
   }
+  __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vnegqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vnegqs)() DART_UNUSED;
-  float res = EXECUTE_TEST_CODE_FLOAT(Vnegqs, test->entry());
-  EXPECT_FLOAT_EQ(2.0, res, 0.0001f);
-}
-
-
-ASSEMBLER_TEST_GENERATE(MultCheckOverflow, assembler) {
-  // Both positive, no overflow
-  Label overflow1, test1;
-  __ LoadImmediate(R0, 42);
-  __ LoadImmediate(R1, 0xff);
-  __ LoadImmediate(R2, 0xf0);
-  __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow1);
-  __ b(&test1);
-  __ Bind(&overflow1);
-  __ LoadImmediate(R0, 1);
-  __ Ret();
-
-
-  // Left negative no overflow.
-  __ Bind(&test1);
-  Label overflow2, test2;
-  __ LoadImmediate(R1, -0xff);
-  __ LoadImmediate(R2, 0xf0);
-  __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow2);
-  __ b(&test2);
-  __ Bind(&overflow2);
-  __ LoadImmediate(R0, 2);
-  __ Ret();
-
-  // Right negative no overflow
-  Label overflow3, test3;
-  __ Bind(&test2);
-  __ LoadImmediate(R1, 0xff);
-  __ LoadImmediate(R2, -0xf0);
-  __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow3);
-  __ b(&test3);
-  __ Bind(&overflow3);
-  __ LoadImmediate(R0, 3);
-  __ Ret();
-
-  // Both negative no overflow.
-  Label overflow4, test4;
-  __ Bind(&test3);
-  __ LoadImmediate(R1, -0xff);
-  __ LoadImmediate(R2, -0xf0);
-  __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow4);
-  __ b(&test4);
-  __ Bind(&overflow4);
-  __ LoadImmediate(R0, 4);
-  __ Ret();
-
-  // Both positive with overflow.
-  Label test5;
-  __ Bind(&test4);
-  __ LoadImmediate(R1, 0x0fffffff);
-  __ LoadImmediate(R2, 0xffff);
-  __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test5);
-  __ LoadImmediate(R0, 5);
-  __ Ret();
-
-  // left negative with overflow.
-  Label test6;
-  __ Bind(&test5);
-  __ LoadImmediate(R1, -0x0fffffff);
-  __ LoadImmediate(R2, 0xffff);
-  __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test6);
-  __ LoadImmediate(R0, 6);
-  __ Ret();
-
-  // right negative with overflow.
-  Label test7;
-  __ Bind(&test6);
-  __ LoadImmediate(R1, 0x0fffffff);
-  __ LoadImmediate(R2, -0xffff);
-  __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test7);
-  __ LoadImmediate(R0, 7);
-  __ Ret();
-
-  // both negative with overflow.
-  Label test8;
-  __ Bind(&test7);
-  __ LoadImmediate(R1, -0x0fffffff);
-  __ LoadImmediate(R2, -0xffff);
-  __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test8);
-  __ LoadImmediate(R0, 8);
-  __ Ret();
-
-  __ Bind(&test8);
-  __ Ret();
-}
-
-
-ASSEMBLER_TEST_RUN(MultCheckOverflow, test) {
-  EXPECT(test != NULL);
-  typedef int (*Tst)() DART_UNUSED;
-  EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+  if (TargetCPUFeatures::vfp_supported()) {
+    typedef float (*Vnegqs)() DART_UNUSED;
+    float res = EXECUTE_TEST_CODE_FLOAT(Vnegqs, test->entry());
+    EXPECT_FLOAT_EQ(2.0, res, 0.0001f);
+  } else {
+    typedef int (*Vnegqs)() DART_UNUSED;
+    EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Vnegqs, test->entry()));
+  }
 }
 
 
 // Called from assembler_test.cc.
 // LR: return address.
 // R0: context.
 // R1: value.
 // R2: growable array.
 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) {
   __ PushList((1 << CTX) | (1 << LR));
@@ skipping 50 matching lines @@
   EXPECT_EQ(ICData::kInt64RangeBit,
             RANGE_OF(Integer::New(static_cast<int64_t>(kMinInt32) - 1)));
   EXPECT_EQ(ICData::kInt64RangeBit, RANGE_OF(Integer::New(kMaxInt64)));
   EXPECT_EQ(ICData::kInt64RangeBit, RANGE_OF(Integer::New(kMinInt64)));
 
   EXPECT_EQ(-1, RANGE_OF(Bool::True().raw()));
 
 #undef RANGE_OF
 }
 
-
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM