| Index: src/mips/macro-assembler-mips.cc
|
| diff --git a/src/mips/macro-assembler-mips.cc b/src/mips/macro-assembler-mips.cc
|
| index f33e6fa063c95e5271d30d401f45632c23b566ef..bc981cbaacba625187b66620dd56de47d72ee520 100644
|
| --- a/src/mips/macro-assembler-mips.cc
|
| +++ b/src/mips/macro-assembler-mips.cc
|
| @@ -789,8 +789,29 @@ void MacroAssembler::Ror(Register rd, Register rs, const Operand& rt) {
|
| }
|
|
|
|
|
| +void MacroAssembler::Pref(int32_t hint, const MemOperand& rs) {
|
| + if (kArchVariant == kLoongson) {
|
| + lw(zero_reg, rs);
|
| + } else {
|
| + pref(hint, rs);
|
| + }
|
| +}
|
| +
|
| +
|
| //------------Pseudo-instructions-------------
|
|
|
| +void MacroAssembler::Ulw(Register rd, const MemOperand& rs) {
|
| + lwr(rd, rs);
|
| + lwl(rd, MemOperand(rs.rm(), rs.offset() + 3));
|
| +}
|
| +
|
| +
|
| +void MacroAssembler::Usw(Register rd, const MemOperand& rs) {
|
| + swr(rd, rs);
|
| + swl(rd, MemOperand(rs.rm(), rs.offset() + 3));
|
| +}
|
| +
|
| +
|
| void MacroAssembler::li(Register dst, Handle<Object> value, LiFlags mode) {
|
| AllowDeferredHandleDereference smi_check;
|
| if (value->IsSmi()) {
|
|
|