Index: src/mips/constants-mips.h |
diff --git a/src/mips/constants-mips.h b/src/mips/constants-mips.h |
index 5a0870fd21832bf3dc1eecf7c6ae4d699797fdb7..dcf8b82db03dad803426eb474fbb37ad722aa812 100644 |
--- a/src/mips/constants-mips.h |
+++ b/src/mips/constants-mips.h |
@@ -124,6 +124,16 @@ const uint32_t kFCSRFlagMask = |
const uint32_t kFCSRExceptionFlagMask = kFCSRFlagMask ^ kFCSRInexactFlagMask; |
+// 'pref' instruction hints |
+const int32_t kPrefHintLoad = 0; |
+const int32_t kPrefHintStore = 1; |
+const int32_t kPrefHintLoadStreamed = 4; |
+const int32_t kPrefHintStoreStreamed = 5; |
+const int32_t kPrefHintLoadRetained = 6; |
+const int32_t kPrefHintStoreRetained = 7; |
+const int32_t kPrefHintWritebackInvalidate = 25; |
+const int32_t kPrefHintPrepareForStore = 30; |
+ |
// Helper functions for converting between register numbers and names. |
class Registers { |
public: |
@@ -297,6 +307,8 @@ enum Opcode { |
LWC1 = ((6 << 3) + 1) << kOpcodeShift, |
LDC1 = ((6 << 3) + 5) << kOpcodeShift, |
+ PREF = ((6 << 3) + 3) << kOpcodeShift, |
+ |
SWC1 = ((7 << 3) + 1) << kOpcodeShift, |
SDC1 = ((7 << 3) + 5) << kOpcodeShift, |