| Index: src/mips/assembler-mips.cc
|
| diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc
|
| index 9aed3bd4aaa8d891f4be68acbad698a287d49c1c..f551dd5e104129e910996606ce45cc0c47573146 100644
|
| --- a/src/mips/assembler-mips.cc
|
| +++ b/src/mips/assembler-mips.cc
|
| @@ -260,6 +260,12 @@ MemOperand::MemOperand(Register rm, int32_t offset) : Operand(rm) {
|
| }
|
|
|
|
|
| +MemOperand::MemOperand(Register rm, int32_t unit, int32_t multiplier,
|
| + OffsetAddend offset_addend) : Operand(rm) {
|
| + offset_ = unit * multiplier + offset_addend;
|
| +}
|
| +
|
| +
|
| // -----------------------------------------------------------------------------
|
| // Specific instructions, constants, and masks.
|
|
|
| @@ -1623,6 +1629,15 @@ void Assembler::ext_(Register rt, Register rs, uint16_t pos, uint16_t size) {
|
| }
|
|
|
|
|
| +void Assembler::pref(int32_t hint, const MemOperand& rs) {
|
| + ASSERT(kArchVariant != kLoongson);
|
| + ASSERT(is_uint5(hint) && is_uint16(rs.offset_));
|
| + Instr instr = PREF | (rs.rm().code() << kRsShift) | (hint << kRtShift)
|
| + | (rs.offset_);
|
| + emit(instr);
|
| +}
|
| +
|
| +
|
| //--------Coprocessor-instructions----------------
|
|
|
| // Load, store, move.
|
|
|