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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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594 | 594 |
595 DEFINE_INSTRUCTION(Slt); | 595 DEFINE_INSTRUCTION(Slt); |
596 DEFINE_INSTRUCTION(Sltu); | 596 DEFINE_INSTRUCTION(Sltu); |
597 | 597 |
598 // MIPS32 R2 instruction macro. | 598 // MIPS32 R2 instruction macro. |
599 DEFINE_INSTRUCTION(Ror); | 599 DEFINE_INSTRUCTION(Ror); |
600 | 600 |
601 #undef DEFINE_INSTRUCTION | 601 #undef DEFINE_INSTRUCTION |
602 #undef DEFINE_INSTRUCTION2 | 602 #undef DEFINE_INSTRUCTION2 |
603 | 603 |
| 604 void Pref(int32_t hint, const MemOperand& rs); |
| 605 |
604 | 606 |
605 // --------------------------------------------------------------------------- | 607 // --------------------------------------------------------------------------- |
606 // Pseudo-instructions. | 608 // Pseudo-instructions. |
607 | 609 |
608 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } | 610 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } |
609 | 611 |
| 612 void Ulw(Register rd, const MemOperand& rs); |
| 613 void Usw(Register rd, const MemOperand& rs); |
| 614 |
610 // Load int32 in the rd register. | 615 // Load int32 in the rd register. |
611 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE); | 616 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE); |
612 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) { | 617 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) { |
613 li(rd, Operand(j), mode); | 618 li(rd, Operand(j), mode); |
614 } | 619 } |
615 void li(Register dst, Handle<Object> value, LiFlags mode = OPTIMIZE_SIZE); | 620 void li(Register dst, Handle<Object> value, LiFlags mode = OPTIMIZE_SIZE); |
616 | 621 |
617 // Push multiple registers on the stack. | 622 // Push multiple registers on the stack. |
618 // Registers are saved in numerical order, with higher numbered registers | 623 // Registers are saved in numerical order, with higher numbered registers |
619 // saved in higher memory addresses. | 624 // saved in higher memory addresses. |
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1690 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) | 1695 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) |
1691 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) | 1696 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) |
1692 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> | 1697 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> |
1693 #else | 1698 #else |
1694 #define ACCESS_MASM(masm) masm-> | 1699 #define ACCESS_MASM(masm) masm-> |
1695 #endif | 1700 #endif |
1696 | 1701 |
1697 } } // namespace v8::internal | 1702 } } // namespace v8::internal |
1698 | 1703 |
1699 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 1704 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
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