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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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782 } else { | 782 } else { |
783 srl(at, rs, rt.imm32_); | 783 srl(at, rs, rt.imm32_); |
784 sll(rd, rs, (0x20 - rt.imm32_) & 0x1f); | 784 sll(rd, rs, (0x20 - rt.imm32_) & 0x1f); |
785 or_(rd, rd, at); | 785 or_(rd, rd, at); |
786 } | 786 } |
787 } | 787 } |
788 } | 788 } |
789 } | 789 } |
790 | 790 |
791 | 791 |
| 792 void MacroAssembler::Pref(int32_t hint, const MemOperand& rs) { |
| 793 if (kArchVariant == kLoongson) { |
| 794 lw(zero_reg, rs); |
| 795 } else { |
| 796 pref(hint, rs); |
| 797 } |
| 798 } |
| 799 |
| 800 |
792 //------------Pseudo-instructions------------- | 801 //------------Pseudo-instructions------------- |
793 | 802 |
| 803 void MacroAssembler::Ulw(Register rd, const MemOperand& rs) { |
| 804 lwr(rd, rs); |
| 805 lwl(rd, MemOperand(rs.rm(), rs.offset() + 3)); |
| 806 } |
| 807 |
| 808 |
| 809 void MacroAssembler::Usw(Register rd, const MemOperand& rs) { |
| 810 swr(rd, rs); |
| 811 swl(rd, MemOperand(rs.rm(), rs.offset() + 3)); |
| 812 } |
| 813 |
| 814 |
794 void MacroAssembler::li(Register dst, Handle<Object> value, LiFlags mode) { | 815 void MacroAssembler::li(Register dst, Handle<Object> value, LiFlags mode) { |
795 AllowDeferredHandleDereference smi_check; | 816 AllowDeferredHandleDereference smi_check; |
796 if (value->IsSmi()) { | 817 if (value->IsSmi()) { |
797 li(dst, Operand(value), mode); | 818 li(dst, Operand(value), mode); |
798 } else { | 819 } else { |
799 ASSERT(value->IsHeapObject()); | 820 ASSERT(value->IsHeapObject()); |
800 if (isolate()->heap()->InNewSpace(*value)) { | 821 if (isolate()->heap()->InNewSpace(*value)) { |
801 Handle<Cell> cell = isolate()->factory()->NewCell(value); | 822 Handle<Cell> cell = isolate()->factory()->NewCell(value); |
802 li(dst, Operand(cell)); | 823 li(dst, Operand(cell)); |
803 lw(dst, FieldMemOperand(dst, Cell::kValueOffset)); | 824 lw(dst, FieldMemOperand(dst, Cell::kValueOffset)); |
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5764 opcode == BGTZL); | 5785 opcode == BGTZL); |
5765 opcode = (cond == eq) ? BEQ : BNE; | 5786 opcode = (cond == eq) ? BEQ : BNE; |
5766 instr = (instr & ~kOpcodeMask) | opcode; | 5787 instr = (instr & ~kOpcodeMask) | opcode; |
5767 masm_.emit(instr); | 5788 masm_.emit(instr); |
5768 } | 5789 } |
5769 | 5790 |
5770 | 5791 |
5771 } } // namespace v8::internal | 5792 } } // namespace v8::internal |
5772 | 5793 |
5773 #endif // V8_TARGET_ARCH_MIPS | 5794 #endif // V8_TARGET_ARCH_MIPS |
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