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Issue 1043263002: Adds armv5 build and test target. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 5 years, 8 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // NOLINT 5 #include "vm/globals.h" // NOLINT
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/longjump.h" 10 #include "vm/longjump.h"
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3263 AddImmediate(SP, -frame_size); 3263 AddImmediate(SP, -frame_size);
3264 } 3264 }
3265 3265
3266 3266
3267 // On entry to a function compiled for OSR, the caller's frame pointer, the 3267 // On entry to a function compiled for OSR, the caller's frame pointer, the
3268 // stack locals, and any copied parameters are already in place. The frame 3268 // stack locals, and any copied parameters are already in place. The frame
3269 // pointer is already set up. The PC marker is not correct for the 3269 // pointer is already set up. The PC marker is not correct for the
3270 // optimized function and there may be extra space for spill slots to 3270 // optimized function and there may be extra space for spill slots to
3271 // allocate. We must also set up the pool pointer for the function. 3271 // allocate. We must also set up the pool pointer for the function.
3272 void Assembler::EnterOsrFrame(intptr_t extra_size) { 3272 void Assembler::EnterOsrFrame(intptr_t extra_size) {
3273 // The offset for the PC marker is adjusted by the difference in PC offset 3273 // mov(IP, Operand(PC)) loads PC + Instr::kPCReadOffset (8). This may be
3274 // between stores and other instructions. In particular, on some ARMv5's the 3274 // different from EntryPointToPcMarkerOffset().
3275 // PC offset for stores is 12 and the offset in other instructions is 8. 3275 const intptr_t offset =
3276 const intptr_t offset = CodeSize() - 3276 CodeSize() + Instr::kPCReadOffset - EntryPointToPcMarkerOffset();
3277 (TargetCPUFeatures::store_pc_read_offset() - Instr::kPCReadOffset);
3278 3277
3279 Comment("EnterOsrFrame"); 3278 Comment("EnterOsrFrame");
3280 mov(IP, Operand(PC)); 3279 mov(IP, Operand(PC));
3281 3280
3282 AddImmediate(IP, -offset); 3281 AddImmediate(IP, -offset);
3283 str(IP, Address(FP, kPcMarkerSlotFromFp * kWordSize)); 3282 str(IP, Address(FP, kPcMarkerSlotFromFp * kWordSize));
3284 3283
3285 // Setup pool pointer for this dart function. 3284 // Setup pool pointer for this dart function.
3286 LoadPoolPointer(); 3285 LoadPoolPointer();
3287 3286
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3582 3581
3583 3582
3584 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3583 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3585 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3584 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3586 return fpu_reg_names[reg]; 3585 return fpu_reg_names[reg];
3587 } 3586 }
3588 3587
3589 } // namespace dart 3588 } // namespace dart
3590 3589
3591 #endif // defined TARGET_ARCH_ARM 3590 #endif // defined TARGET_ARCH_ARM
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