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Side by Side Diff: src/mips64/assembler-mips64.h

Issue 1041833002: MIPS64: Tweak constants used in seralization process to reflect real state. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 8 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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552 552
553 // Here we are patching the address in the LUI/ORI instruction pair. 553 // Here we are patching the address in the LUI/ORI instruction pair.
554 // These values are used in the serialization process and must be zero for 554 // These values are used in the serialization process and must be zero for
555 // MIPS platform, as Code, Embedded Object or External-reference pointers 555 // MIPS platform, as Code, Embedded Object or External-reference pointers
556 // are split across two consecutive instructions and don't exist separately 556 // are split across two consecutive instructions and don't exist separately
557 // in the code, so the serializer should not step forwards in memory after 557 // in the code, so the serializer should not step forwards in memory after
558 // a target is resolved and written. 558 // a target is resolved and written.
559 static const int kSpecialTargetSize = 0; 559 static const int kSpecialTargetSize = 0;
560 560
561 // Number of consecutive instructions used to store 32bit/64bit constant. 561 // Number of consecutive instructions used to store 32bit/64bit constant.
562 // Before jump-optimizations, this constant was used in 562 // This constant was used in RelocInfo::target_address_address() function
563 // RelocInfo::target_address_address() function to tell serializer address of 563 // to tell serializer address of the instruction that follows
564 // the instruction that follows LUI/ORI instruction pair. Now, with new jump 564 // LUI/ORI instruction pair.
565 // optimization, where jump-through-register instruction that usually 565 static const int kInstructionsFor32BitConstant = 2;
566 // follows LUI/ORI pair is substituted with J/JAL, this constant equals 566 static const int kInstructionsFor64BitConstant = 4;
567 // to 3 instructions (LUI+ORI+J/JAL/JR/JALR).
568 static const int kInstructionsFor32BitConstant = 3;
569 static const int kInstructionsFor64BitConstant = 5;
570 567
571 // Distance between the instruction referring to the address of the call 568 // Distance between the instruction referring to the address of the call
572 // target and the return address. 569 // target and the return address.
573 static const int kCallTargetAddressOffset = 6 * kInstrSize; 570 static const int kCallTargetAddressOffset = 6 * kInstrSize;
574 571
575 // Distance between start of patched return sequence and the emitted address 572 // Distance between start of patched return sequence and the emitted address
576 // to jump to. 573 // to jump to.
577 static const int kPatchReturnSequenceAddressOffset = 0; 574 static const int kPatchReturnSequenceAddressOffset = 0;
578 575
579 // Distance between start of patched debug break slot and the emitted address 576 // Distance between start of patched debug break slot and the emitted address
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1437 class EnsureSpace BASE_EMBEDDED { 1434 class EnsureSpace BASE_EMBEDDED {
1438 public: 1435 public:
1439 explicit EnsureSpace(Assembler* assembler) { 1436 explicit EnsureSpace(Assembler* assembler) {
1440 assembler->CheckBuffer(); 1437 assembler->CheckBuffer();
1441 } 1438 }
1442 }; 1439 };
1443 1440
1444 } } // namespace v8::internal 1441 } } // namespace v8::internal
1445 1442
1446 #endif // V8_ARM_ASSEMBLER_MIPS_H_ 1443 #endif // V8_ARM_ASSEMBLER_MIPS_H_
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