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Side by Side Diff: src/compiler/arm64/instruction-codes-arm64.h

Issue 1040053002: Reland "Match fneg for -0.0 - x pattern." (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 76 matching lines...) Expand 10 before | Expand all | Expand 10 after
87 V(Arm64Float32Min) \ 87 V(Arm64Float32Min) \
88 V(Arm64Float32Sqrt) \ 88 V(Arm64Float32Sqrt) \
89 V(Arm64Float64Cmp) \ 89 V(Arm64Float64Cmp) \
90 V(Arm64Float64Add) \ 90 V(Arm64Float64Add) \
91 V(Arm64Float64Sub) \ 91 V(Arm64Float64Sub) \
92 V(Arm64Float64Mul) \ 92 V(Arm64Float64Mul) \
93 V(Arm64Float64Div) \ 93 V(Arm64Float64Div) \
94 V(Arm64Float64Mod) \ 94 V(Arm64Float64Mod) \
95 V(Arm64Float64Max) \ 95 V(Arm64Float64Max) \
96 V(Arm64Float64Min) \ 96 V(Arm64Float64Min) \
97 V(Arm64Float64Neg) \
97 V(Arm64Float64Sqrt) \ 98 V(Arm64Float64Sqrt) \
98 V(Arm64Float64RoundDown) \ 99 V(Arm64Float64RoundDown) \
99 V(Arm64Float64RoundTiesAway) \ 100 V(Arm64Float64RoundTiesAway) \
100 V(Arm64Float64RoundTruncate) \ 101 V(Arm64Float64RoundTruncate) \
101 V(Arm64Float64RoundUp) \ 102 V(Arm64Float64RoundUp) \
102 V(Arm64Float32ToFloat64) \ 103 V(Arm64Float32ToFloat64) \
103 V(Arm64Float64ToFloat32) \ 104 V(Arm64Float64ToFloat32) \
104 V(Arm64Float64ToInt32) \ 105 V(Arm64Float64ToInt32) \
105 V(Arm64Float64ToUint32) \ 106 V(Arm64Float64ToUint32) \
106 V(Arm64Int32ToFloat64) \ 107 V(Arm64Int32ToFloat64) \
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after
148 V(Operand2_R_ASR_I) /* %r0 ASR K */ \ 149 V(Operand2_R_ASR_I) /* %r0 ASR K */ \
149 V(Operand2_R_ROR_I) /* %r0 ROR K */ \ 150 V(Operand2_R_ROR_I) /* %r0 ROR K */ \
150 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \ 151 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \
151 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */ 152 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */
152 153
153 } // namespace internal 154 } // namespace internal
154 } // namespace compiler 155 } // namespace compiler
155 } // namespace v8 156 } // namespace v8
156 157
157 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 158 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
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