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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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487 // The high 8 bits are set to zero. | 487 // The high 8 bits are set to zero. |
488 void label_at_put(Label* L, int at_offset); | 488 void label_at_put(Label* L, int at_offset); |
489 | 489 |
490 // Read/Modify the code target address in the branch/call instruction at pc. | 490 // Read/Modify the code target address in the branch/call instruction at pc. |
491 static Address target_address_at(Address pc); | 491 static Address target_address_at(Address pc); |
492 static void set_target_address_at(Address pc, | 492 static void set_target_address_at(Address pc, |
493 Address target, | 493 Address target, |
494 ICacheFlushMode icache_flush_mode = | 494 ICacheFlushMode icache_flush_mode = |
495 FLUSH_ICACHE_IF_NEEDED); | 495 FLUSH_ICACHE_IF_NEEDED); |
496 // On MIPS there is no Constant Pool so we skip that parameter. | 496 // On MIPS there is no Constant Pool so we skip that parameter. |
497 INLINE(static Address target_address_at(Address pc, | 497 INLINE(static Address target_address_at(Address pc, Address constant_pool)) { |
498 ConstantPoolArray* constant_pool)) { | |
499 return target_address_at(pc); | 498 return target_address_at(pc); |
500 } | 499 } |
501 INLINE(static void set_target_address_at(Address pc, | 500 INLINE(static void set_target_address_at( |
502 ConstantPoolArray* constant_pool, | 501 Address pc, Address constant_pool, Address target, |
503 Address target, | 502 ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED)) { |
504 ICacheFlushMode icache_flush_mode = | |
505 FLUSH_ICACHE_IF_NEEDED)) { | |
506 set_target_address_at(pc, target, icache_flush_mode); | 503 set_target_address_at(pc, target, icache_flush_mode); |
507 } | 504 } |
508 INLINE(static Address target_address_at(Address pc, Code* code)) { | 505 INLINE(static Address target_address_at(Address pc, Code* code)) { |
509 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; | 506 Address constant_pool = code ? code->constant_pool() : NULL; |
510 return target_address_at(pc, constant_pool); | 507 return target_address_at(pc, constant_pool); |
511 } | 508 } |
512 INLINE(static void set_target_address_at(Address pc, | 509 INLINE(static void set_target_address_at(Address pc, |
513 Code* code, | 510 Code* code, |
514 Address target, | 511 Address target, |
515 ICacheFlushMode icache_flush_mode = | 512 ICacheFlushMode icache_flush_mode = |
516 FLUSH_ICACHE_IF_NEEDED)) { | 513 FLUSH_ICACHE_IF_NEEDED)) { |
517 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; | 514 Address constant_pool = code ? code->constant_pool() : NULL; |
518 set_target_address_at(pc, constant_pool, target, icache_flush_mode); | 515 set_target_address_at(pc, constant_pool, target, icache_flush_mode); |
519 } | 516 } |
520 | 517 |
521 // Return the code target address at a call site from the return address | 518 // Return the code target address at a call site from the return address |
522 // of that call in the instruction stream. | 519 // of that call in the instruction stream. |
523 inline static Address target_address_from_return_address(Address pc); | 520 inline static Address target_address_from_return_address(Address pc); |
524 | 521 |
525 // Return the code target address of the patch debug break slot | 522 // Return the code target address of the patch debug break slot |
526 inline static Address break_address_from_return_address(Address pc); | 523 inline static Address break_address_from_return_address(Address pc); |
527 | 524 |
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1438 class EnsureSpace BASE_EMBEDDED { | 1435 class EnsureSpace BASE_EMBEDDED { |
1439 public: | 1436 public: |
1440 explicit EnsureSpace(Assembler* assembler) { | 1437 explicit EnsureSpace(Assembler* assembler) { |
1441 assembler->CheckBuffer(); | 1438 assembler->CheckBuffer(); |
1442 } | 1439 } |
1443 }; | 1440 }; |
1444 | 1441 |
1445 } } // namespace v8::internal | 1442 } } // namespace v8::internal |
1446 | 1443 |
1447 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1444 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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