| OLD | NEW |
| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
| (...skipping 483 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 494 // The high 8 bits are set to zero. | 494 // The high 8 bits are set to zero. |
| 495 void label_at_put(Label* L, int at_offset); | 495 void label_at_put(Label* L, int at_offset); |
| 496 | 496 |
| 497 // Read/Modify the code target address in the branch/call instruction at pc. | 497 // Read/Modify the code target address in the branch/call instruction at pc. |
| 498 static Address target_address_at(Address pc); | 498 static Address target_address_at(Address pc); |
| 499 static void set_target_address_at(Address pc, | 499 static void set_target_address_at(Address pc, |
| 500 Address target, | 500 Address target, |
| 501 ICacheFlushMode icache_flush_mode = | 501 ICacheFlushMode icache_flush_mode = |
| 502 FLUSH_ICACHE_IF_NEEDED); | 502 FLUSH_ICACHE_IF_NEEDED); |
| 503 // On MIPS there is no Constant Pool so we skip that parameter. | 503 // On MIPS there is no Constant Pool so we skip that parameter. |
| 504 INLINE(static Address target_address_at(Address pc, | 504 INLINE(static Address target_address_at(Address pc, Address constant_pool)) { |
| 505 ConstantPoolArray* constant_pool)) { | |
| 506 return target_address_at(pc); | 505 return target_address_at(pc); |
| 507 } | 506 } |
| 508 INLINE(static void set_target_address_at(Address pc, | 507 INLINE(static void set_target_address_at( |
| 509 ConstantPoolArray* constant_pool, | 508 Address pc, Address constant_pool, Address target, |
| 510 Address target, | 509 ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED)) { |
| 511 ICacheFlushMode icache_flush_mode = | |
| 512 FLUSH_ICACHE_IF_NEEDED)) { | |
| 513 set_target_address_at(pc, target, icache_flush_mode); | 510 set_target_address_at(pc, target, icache_flush_mode); |
| 514 } | 511 } |
| 515 INLINE(static Address target_address_at(Address pc, Code* code)) { | 512 INLINE(static Address target_address_at(Address pc, Code* code)) { |
| 516 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; | 513 Address constant_pool = code ? code->constant_pool() : NULL; |
| 517 return target_address_at(pc, constant_pool); | 514 return target_address_at(pc, constant_pool); |
| 518 } | 515 } |
| 519 INLINE(static void set_target_address_at(Address pc, | 516 INLINE(static void set_target_address_at(Address pc, |
| 520 Code* code, | 517 Code* code, |
| 521 Address target, | 518 Address target, |
| 522 ICacheFlushMode icache_flush_mode = | 519 ICacheFlushMode icache_flush_mode = |
| 523 FLUSH_ICACHE_IF_NEEDED)) { | 520 FLUSH_ICACHE_IF_NEEDED)) { |
| 524 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; | 521 Address constant_pool = code ? code->constant_pool() : NULL; |
| 525 set_target_address_at(pc, constant_pool, target, icache_flush_mode); | 522 set_target_address_at(pc, constant_pool, target, icache_flush_mode); |
| 526 } | 523 } |
| 527 | 524 |
| 528 // Return the code target address at a call site from the return address | 525 // Return the code target address at a call site from the return address |
| 529 // of that call in the instruction stream. | 526 // of that call in the instruction stream. |
| 530 inline static Address target_address_from_return_address(Address pc); | 527 inline static Address target_address_from_return_address(Address pc); |
| 531 | 528 |
| 532 // Return the code target address of the patch debug break slot | 529 // Return the code target address of the patch debug break slot |
| 533 inline static Address break_address_from_return_address(Address pc); | 530 inline static Address break_address_from_return_address(Address pc); |
| 534 | 531 |
| (...skipping 863 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1398 class EnsureSpace BASE_EMBEDDED { | 1395 class EnsureSpace BASE_EMBEDDED { |
| 1399 public: | 1396 public: |
| 1400 explicit EnsureSpace(Assembler* assembler) { | 1397 explicit EnsureSpace(Assembler* assembler) { |
| 1401 assembler->CheckBuffer(); | 1398 assembler->CheckBuffer(); |
| 1402 } | 1399 } |
| 1403 }; | 1400 }; |
| 1404 | 1401 |
| 1405 } } // namespace v8::internal | 1402 } } // namespace v8::internal |
| 1406 | 1403 |
| 1407 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1404 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
| OLD | NEW |