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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 467 | 467 |
| 468 | 468 |
| 469 void Assembler::emit_w(const Immediate& x) { | 469 void Assembler::emit_w(const Immediate& x) { |
| 470 DCHECK(RelocInfo::IsNone(x.rmode_)); | 470 DCHECK(RelocInfo::IsNone(x.rmode_)); |
| 471 uint16_t value = static_cast<uint16_t>(x.x_); | 471 uint16_t value = static_cast<uint16_t>(x.x_); |
| 472 reinterpret_cast<uint16_t*>(pc_)[0] = value; | 472 reinterpret_cast<uint16_t*>(pc_)[0] = value; |
| 473 pc_ += sizeof(uint16_t); | 473 pc_ += sizeof(uint16_t); |
| 474 } | 474 } |
| 475 | 475 |
| 476 | 476 |
| 477 Address Assembler::target_address_at(Address pc, | 477 Address Assembler::target_address_at(Address pc, Address constant_pool) { |
| 478 ConstantPoolArray* constant_pool) { | |
| 479 return pc + sizeof(int32_t) + *reinterpret_cast<int32_t*>(pc); | 478 return pc + sizeof(int32_t) + *reinterpret_cast<int32_t*>(pc); |
| 480 } | 479 } |
| 481 | 480 |
| 482 | 481 |
| 483 void Assembler::set_target_address_at(Address pc, | 482 void Assembler::set_target_address_at(Address pc, Address constant_pool, |
| 484 ConstantPoolArray* constant_pool, | |
| 485 Address target, | 483 Address target, |
| 486 ICacheFlushMode icache_flush_mode) { | 484 ICacheFlushMode icache_flush_mode) { |
| 487 int32_t* p = reinterpret_cast<int32_t*>(pc); | 485 int32_t* p = reinterpret_cast<int32_t*>(pc); |
| 488 *p = target - (pc + sizeof(int32_t)); | 486 *p = target - (pc + sizeof(int32_t)); |
| 489 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 487 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
| 490 CpuFeatures::FlushICache(p, sizeof(int32_t)); | 488 CpuFeatures::FlushICache(p, sizeof(int32_t)); |
| 491 } | 489 } |
| 492 } | 490 } |
| 493 | 491 |
| 494 | 492 |
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| 588 | 586 |
| 589 | 587 |
| 590 Operand::Operand(Immediate imm) { | 588 Operand::Operand(Immediate imm) { |
| 591 // [disp/r] | 589 // [disp/r] |
| 592 set_modrm(0, ebp); | 590 set_modrm(0, ebp); |
| 593 set_dispr(imm.x_, imm.rmode_); | 591 set_dispr(imm.x_, imm.rmode_); |
| 594 } | 592 } |
| 595 } } // namespace v8::internal | 593 } } // namespace v8::internal |
| 596 | 594 |
| 597 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_ | 595 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_ |
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