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Side by Side Diff: src/arm/assembler-arm.h

Issue 1030353003: Enable constant pool support. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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748 // Links the label to the current position if it is still unbound 748 // Links the label to the current position if it is still unbound
749 // Manages the jump elimination optimization if the second parameter is true. 749 // Manages the jump elimination optimization if the second parameter is true.
750 int branch_offset(Label* L, bool jump_elimination_allowed); 750 int branch_offset(Label* L, bool jump_elimination_allowed);
751 751
752 // Returns true if the given pc address is the start of a constant pool load 752 // Returns true if the given pc address is the start of a constant pool load
753 // instruction sequence. 753 // instruction sequence.
754 INLINE(static bool is_constant_pool_load(Address pc)); 754 INLINE(static bool is_constant_pool_load(Address pc));
755 755
756 // Return the address in the constant pool of the code target address used by 756 // Return the address in the constant pool of the code target address used by
757 // the branch/call instruction at pc, or the object in a mov. 757 // the branch/call instruction at pc, or the object in a mov.
758 INLINE(static Address constant_pool_entry_address( 758 INLINE(static Address constant_pool_entry_address(Address pc,
759 Address pc, ConstantPoolArray* constant_pool)); 759 Address constant_pool));
760 760
761 // Read/Modify the code target address in the branch/call instruction at pc. 761 // Read/Modify the code target address in the branch/call instruction at pc.
762 INLINE(static Address target_address_at(Address pc, 762 INLINE(static Address target_address_at(Address pc, Address constant_pool));
763 ConstantPoolArray* constant_pool)); 763 INLINE(static void set_target_address_at(
764 INLINE(static void set_target_address_at(Address pc, 764 Address pc, Address constant_pool, Address target,
765 ConstantPoolArray* constant_pool, 765 ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED));
766 Address target,
767 ICacheFlushMode icache_flush_mode =
768 FLUSH_ICACHE_IF_NEEDED));
769 INLINE(static Address target_address_at(Address pc, Code* code)) { 766 INLINE(static Address target_address_at(Address pc, Code* code)) {
770 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; 767 Address constant_pool = code ? code->constant_pool() : NULL;
771 return target_address_at(pc, constant_pool); 768 return target_address_at(pc, constant_pool);
772 } 769 }
773 INLINE(static void set_target_address_at(Address pc, 770 INLINE(static void set_target_address_at(Address pc,
774 Code* code, 771 Code* code,
775 Address target, 772 Address target,
776 ICacheFlushMode icache_flush_mode = 773 ICacheFlushMode icache_flush_mode =
777 FLUSH_ICACHE_IF_NEEDED)) { 774 FLUSH_ICACHE_IF_NEEDED)) {
778 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; 775 Address constant_pool = code ? code->constant_pool() : NULL;
779 set_target_address_at(pc, constant_pool, target, icache_flush_mode); 776 set_target_address_at(pc, constant_pool, target, icache_flush_mode);
780 } 777 }
781 778
782 // Return the code target address at a call site from the return address 779 // Return the code target address at a call site from the return address
783 // of that call in the instruction stream. 780 // of that call in the instruction stream.
784 INLINE(static Address target_address_from_return_address(Address pc)); 781 INLINE(static Address target_address_from_return_address(Address pc));
785 782
786 // Given the address of the beginning of a call, return the address 783 // Given the address of the beginning of a call, return the address
787 // in the instruction stream that the call will return from. 784 // in the instruction stream that the call will return from.
788 INLINE(static Address return_address_from_call_start(Address pc)); 785 INLINE(static Address return_address_from_call_start(Address pc));
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1510 static const int kMaxNumPending32RelocInfo = kMaxDistToIntPool/kInstrSize; 1507 static const int kMaxNumPending32RelocInfo = kMaxDistToIntPool/kInstrSize;
1511 static const int kMaxNumPending64RelocInfo = kMaxDistToFPPool/kInstrSize; 1508 static const int kMaxNumPending64RelocInfo = kMaxDistToFPPool/kInstrSize;
1512 1509
1513 // Postpone the generation of the constant pool for the specified number of 1510 // Postpone the generation of the constant pool for the specified number of
1514 // instructions. 1511 // instructions.
1515 void BlockConstPoolFor(int instructions); 1512 void BlockConstPoolFor(int instructions);
1516 1513
1517 // Check if is time to emit a constant pool. 1514 // Check if is time to emit a constant pool.
1518 void CheckConstPool(bool force_emit, bool require_jump); 1515 void CheckConstPool(bool force_emit, bool require_jump);
1519 1516
1517 bool is_ool_constant_pool_available() const {
1518 return is_constant_pool_available();
1519 }
1520
1520 // Allocate a constant pool of the correct size for the generated code. 1521 // Allocate a constant pool of the correct size for the generated code.
1521 Handle<ConstantPoolArray> NewConstantPool(Isolate* isolate); 1522 Handle<ConstantPoolArray> NewConstantPool(Isolate* isolate);
1522 1523
1523 // Generate the constant pool for the generated code. 1524 // Generate the constant pool for the generated code.
1524 void PopulateConstantPool(ConstantPoolArray* constant_pool); 1525 void PopulateConstantPool(ConstantPoolArray* constant_pool);
1525 1526
1526 bool use_extended_constant_pool() const { 1527 bool use_extended_constant_pool() const {
1527 return constant_pool_builder_.current_section() == 1528 return constant_pool_builder_.current_section() ==
1528 ConstantPoolArray::EXTENDED_SECTION; 1529 ConstantPoolArray::EXTENDED_SECTION;
1529 } 1530 }
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1575 // trigger a check. 1576 // trigger a check.
1576 next_buffer_check_ = no_const_pool_before_; 1577 next_buffer_check_ = no_const_pool_before_;
1577 } 1578 }
1578 } 1579 }
1579 1580
1580 bool is_const_pool_blocked() const { 1581 bool is_const_pool_blocked() const {
1581 return (const_pool_blocked_nesting_ > 0) || 1582 return (const_pool_blocked_nesting_ > 0) ||
1582 (pc_offset() < no_const_pool_before_); 1583 (pc_offset() < no_const_pool_before_);
1583 } 1584 }
1584 1585
1586 void set_ool_constant_pool_available(bool available) {
1587 set_constant_pool_available(available);
1588 }
1589
1585 private: 1590 private:
1586 int next_buffer_check_; // pc offset of next buffer check 1591 int next_buffer_check_; // pc offset of next buffer check
1587 1592
1588 // Code generation 1593 // Code generation
1589 // The relocation writer's position is at least kGap bytes below the end of 1594 // The relocation writer's position is at least kGap bytes below the end of
1590 // the generated instructions. This is so that multi-instruction sequences do 1595 // the generated instructions. This is so that multi-instruction sequences do
1591 // not have to check for overflow. The same is true for writes of large 1596 // not have to check for overflow. The same is true for writes of large
1592 // relocation info entries. 1597 // relocation info entries.
1593 static const int kGap = 32; 1598 static const int kGap = 32;
1594 1599
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1689 public: 1694 public:
1690 explicit EnsureSpace(Assembler* assembler) { 1695 explicit EnsureSpace(Assembler* assembler) {
1691 assembler->CheckBuffer(); 1696 assembler->CheckBuffer();
1692 } 1697 }
1693 }; 1698 };
1694 1699
1695 1700
1696 } } // namespace v8::internal 1701 } } // namespace v8::internal
1697 1702
1698 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1703 #endif // V8_ARM_ASSEMBLER_ARM_H_
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