Enable constant pool support.

src/arm/assembler-arm-inl.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 556 matching lines @@
                 Memory::int32_at(pc + 2 * Assembler::kInstrSize)));
   } else {
     return !Assembler::IsMovImmed(Memory::int32_at(pc)) ||
            (FLAG_enable_ool_constant_pool &&
             Assembler::IsLdrPpRegOffset(
                 Memory::int32_at(pc + 4 * Assembler::kInstrSize)));
   }
 }
 
 
-Address Assembler::constant_pool_entry_address(
-    Address pc, ConstantPoolArray* constant_pool) {
+Address Assembler::constant_pool_entry_address(Address pc,
+                                               Address constant_pool) {
   if (FLAG_enable_ool_constant_pool) {
     DCHECK(constant_pool != NULL);
     int cp_offset;
     if (!CpuFeatures::IsSupported(ARMv7) && IsMovImmed(Memory::int32_at(pc))) {
       DCHECK(IsOrrImmed(Memory::int32_at(pc + kInstrSize)) &&
              IsOrrImmed(Memory::int32_at(pc + 2 * kInstrSize)) &&
              IsOrrImmed(Memory::int32_at(pc + 3 * kInstrSize)) &&
              IsLdrPpRegOffset(Memory::int32_at(pc + 4 * kInstrSize)));
       // This is an extended constant pool lookup (ARMv6).
       Instr mov_instr = instr_at(pc);
       Instr orr_instr_1 = instr_at(pc + kInstrSize);
       Instr orr_instr_2 = instr_at(pc + 2 * kInstrSize);
       Instr orr_instr_3 = instr_at(pc + 3 * kInstrSize);
       cp_offset = DecodeShiftImm(mov_instr) | DecodeShiftImm(orr_instr_1) |
                   DecodeShiftImm(orr_instr_2) | DecodeShiftImm(orr_instr_3);
     } else if (IsMovW(Memory::int32_at(pc))) {
       DCHECK(IsMovT(Memory::int32_at(pc + kInstrSize)) &&
              IsLdrPpRegOffset(Memory::int32_at(pc + 2 * kInstrSize)));
       // This is an extended constant pool lookup (ARMv7).
       Instruction* movw_instr = Instruction::At(pc);
       Instruction* movt_instr = Instruction::At(pc + kInstrSize);
       cp_offset = (movt_instr->ImmedMovwMovtValue() << 16) |
                   movw_instr->ImmedMovwMovtValue();
     } else {
       // This is a small constant pool lookup.
       DCHECK(Assembler::IsLdrPpImmediateOffset(Memory::int32_at(pc)));
       cp_offset = GetLdrRegisterImmediateOffset(Memory::int32_at(pc));
     }
-    return reinterpret_cast<Address>(constant_pool) + cp_offset;
+    return constant_pool + cp_offset;
   } else {
     DCHECK(Assembler::IsLdrPcImmediateOffset(Memory::int32_at(pc)));
     Instr instr = Memory::int32_at(pc);
     return pc + GetLdrRegisterImmediateOffset(instr) + kPcLoadDelta;
   }
 }
 
 
-Address Assembler::target_address_at(Address pc,
-                                     ConstantPoolArray* constant_pool) {
+Address Assembler::target_address_at(Address pc, Address constant_pool) {
   if (is_constant_pool_load(pc)) {
     // This is a constant pool lookup. Return the value in the constant pool.
     return Memory::Address_at(constant_pool_entry_address(pc, constant_pool));
   } else if (CpuFeatures::IsSupported(ARMv7)) {
     // This is an movw / movt immediate load. Return the immediate.
     DCHECK(IsMovW(Memory::int32_at(pc)) &&
            IsMovT(Memory::int32_at(pc + kInstrSize)));
     Instruction* movw_instr = Instruction::At(pc);
     Instruction* movt_instr = Instruction::At(pc + kInstrSize);
     return reinterpret_cast<Address>(
@@ skipping 10 matching lines @@
     Instr orr_instr_2 = instr_at(pc + 2 * kInstrSize);
     Instr orr_instr_3 = instr_at(pc + 3 * kInstrSize);
     Address ret = reinterpret_cast<Address>(
         DecodeShiftImm(mov_instr) | DecodeShiftImm(orr_instr_1) |
         DecodeShiftImm(orr_instr_2) | DecodeShiftImm(orr_instr_3));
     return ret;
   }
 }
 
 
-void Assembler::set_target_address_at(Address pc,
-                                      ConstantPoolArray* constant_pool,
+void Assembler::set_target_address_at(Address pc, Address constant_pool,
                                       Address target,
                                       ICacheFlushMode icache_flush_mode) {
   if (is_constant_pool_load(pc)) {
     // This is a constant pool lookup. Update the entry in the constant pool.
     Memory::Address_at(constant_pool_entry_address(pc, constant_pool)) = target;
     // Intuitively, we would think it is necessary to always flush the
     // instruction cache after patching a target address in the code as follows:
     //   CpuFeatures::FlushICache(pc, sizeof(target));
     // However, on ARM, no instruction is actually patched in the case
     // of embedded constants of the form:
@@ skipping 34 matching lines @@
     if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
       CpuFeatures::FlushICache(pc, 4 * kInstrSize);
     }
   }
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_ASSEMBLER_ARM_INL_H_