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Issue 1027193002: MIPS64: [turbofan] Support Float64Min and Float64Max. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Add bodies of 32 bits visitor()'s. Created 5 years, 7 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 24 matching lines...) Expand all
35 V(MipsTst) \ 35 V(MipsTst) \
36 V(MipsCmp) \ 36 V(MipsCmp) \
37 V(MipsCmpS) \ 37 V(MipsCmpS) \
38 V(MipsAddS) \ 38 V(MipsAddS) \
39 V(MipsSubS) \ 39 V(MipsSubS) \
40 V(MipsMulS) \ 40 V(MipsMulS) \
41 V(MipsDivS) \ 41 V(MipsDivS) \
42 V(MipsModS) \ 42 V(MipsModS) \
43 V(MipsAbsS) \ 43 V(MipsAbsS) \
44 V(MipsSqrtS) \ 44 V(MipsSqrtS) \
45 V(MipsMaxS) \
46 V(MipsMinS) \
45 V(MipsCmpD) \ 47 V(MipsCmpD) \
46 V(MipsAddD) \ 48 V(MipsAddD) \
47 V(MipsSubD) \ 49 V(MipsSubD) \
48 V(MipsMulD) \ 50 V(MipsMulD) \
49 V(MipsDivD) \ 51 V(MipsDivD) \
50 V(MipsModD) \ 52 V(MipsModD) \
51 V(MipsAbsD) \ 53 V(MipsAbsD) \
52 V(MipsSqrtD) \ 54 V(MipsSqrtD) \
55 V(MipsMaxD) \
56 V(MipsMinD) \
53 V(MipsFloat64RoundDown) \ 57 V(MipsFloat64RoundDown) \
54 V(MipsFloat64RoundTruncate) \ 58 V(MipsFloat64RoundTruncate) \
55 V(MipsFloat64RoundUp) \ 59 V(MipsFloat64RoundUp) \
56 V(MipsCvtSD) \ 60 V(MipsCvtSD) \
57 V(MipsCvtDS) \ 61 V(MipsCvtDS) \
58 V(MipsTruncWD) \ 62 V(MipsTruncWD) \
59 V(MipsTruncUwD) \ 63 V(MipsTruncUwD) \
60 V(MipsCvtDW) \ 64 V(MipsCvtDW) \
61 V(MipsCvtDUw) \ 65 V(MipsCvtDUw) \
62 V(MipsLb) \ 66 V(MipsLb) \
(...skipping 35 matching lines...) Expand 10 before | Expand all | Expand 10 after
98 #define TARGET_ADDRESSING_MODE_LIST(V) \ 102 #define TARGET_ADDRESSING_MODE_LIST(V) \
99 V(MRI) /* [%r0 + K] */ \ 103 V(MRI) /* [%r0 + K] */ \
100 V(MRR) /* [%r0 + %r1] */ 104 V(MRR) /* [%r0 + %r1] */
101 105
102 106
103 } // namespace compiler 107 } // namespace compiler
104 } // namespace internal 108 } // namespace internal
105 } // namespace v8 109 } // namespace v8
106 110
107 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 111 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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