Index: src/IceTypes.h |
diff --git a/src/IceTypes.h b/src/IceTypes.h |
index 2cf5e401fd9f3c8597c65a04b5c3b27cd822ad6c..297fad3da6da86414362249ff969b97b5b50c905 100644 |
--- a/src/IceTypes.h |
+++ b/src/IceTypes.h |
@@ -40,6 +40,16 @@ inline Ostream &operator<<(Ostream &Stream, TargetArch Arch) { |
return Stream << targetArchString(Arch); |
} |
+// The list of all target instruction sets. Individual targets will |
+// map this to include only what is valid for the target. |
+enum TargetInstructionSet { |
+ X86InstructionSet_Begin, |
+ // SSE2 is the PNaCl baseline instruction set. |
+ X86InstructionSet_SSE2 = X86InstructionSet_Begin, |
+ X86InstructionSet_SSE4_1, |
+ X86InstructionSet_End, |
+}; |
+ |
enum OptLevel { Opt_m1, Opt_0, Opt_1, Opt_2 }; |
size_t typeWidthInBytes(Type Ty); |