[ARM64] [turbofan] Support Float64Min and Float64Max.

src/compiler/arm64/instruction-codes-arm64.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 83 matching lines @@
   V(Arm64Float64ToFloat32)         \
   V(Arm64Float64ToInt32)           \
   V(Arm64Float64ToUint32)          \
   V(Arm64Int32ToFloat64)           \
   V(Arm64Uint32ToFloat64)          \
   V(Arm64Float64ExtractLowWord32)  \
   V(Arm64Float64ExtractHighWord32) \
   V(Arm64Float64InsertLowWord32)   \
   V(Arm64Float64InsertHighWord32)  \
   V(Arm64Float64MoveU64)           \
+  V(Arm64Float64Max)               \
+  V(Arm64Float64Min)               \
   V(Arm64LdrS)                     \
   V(Arm64StrS)                     \
   V(Arm64LdrD)                     \
   V(Arm64StrD)                     \
   V(Arm64Ldrb)                     \
   V(Arm64Ldrsb)                    \
   V(Arm64Strb)                     \
   V(Arm64Ldrh)                     \
   V(Arm64Ldrsh)                    \
   V(Arm64Strh)                     \
@@ skipping 25 matching lines @@
   V(Operand2_R_ASR_I) /* %r0 ASR K */                       \
   V(Operand2_R_ROR_I) /* %r0 ROR K */                       \
   V(Operand2_R_UXTB)  /* %r0 UXTB (unsigned extend byte) */ \
   V(Operand2_R_UXTH)  /* %r0 UXTH (unsigned extend halfword) */
 
 }  // namespace internal
 }  // namespace compiler
 }  // namespace v8
 
 #endif  // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_