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Side by Side Diff: src/assembler_ia32.cpp

Issue 1022573004: Subzero: Add fabs intrinsic support. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review changes Created 5 years, 9 months ago
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1 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32 -------------===// 1 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32 -------------===//
2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
3 // for details. All rights reserved. Use of this source code is governed by a 3 // for details. All rights reserved. Use of this source code is governed by a
4 // BSD-style license that can be found in the LICENSE file. 4 // BSD-style license that can be found in the LICENSE file.
5 // 5 //
6 // Modified by the Subzero authors. 6 // Modified by the Subzero authors.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // The Subzero Code Generator 10 // The Subzero Code Generator
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697 if (Ty == IceType_i16) { 697 if (Ty == IceType_i16) {
698 EmitUint8(0x71); 698 EmitUint8(0x71);
699 } else { 699 } else {
700 assert(Ty == IceType_i32); 700 assert(Ty == IceType_i32);
701 EmitUint8(0x72); 701 EmitUint8(0x72);
702 } 702 }
703 EmitRegisterOperand(4, dst); 703 EmitRegisterOperand(4, dst);
704 EmitUint8(imm.value() & 0xFF); 704 EmitUint8(imm.value() & 0xFF);
705 } 705 }
706 706
707 void AssemblerX86::psrl(Type Ty, XmmRegister dst, XmmRegister src) {
708 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
709 EmitUint8(0x66);
710 EmitUint8(0x0F);
711 if (Ty == IceType_i16) {
712 EmitUint8(0xD1);
713 } else if (Ty == IceType_f64) {
714 EmitUint8(0xD3);
715 } else {
716 assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
717 EmitUint8(0xD2);
718 }
719 EmitXmmRegisterOperand(dst, src);
720 }
721
722 void AssemblerX86::psrl(Type Ty, XmmRegister dst, const Address &src) {
723 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
724 EmitUint8(0x66);
725 EmitUint8(0x0F);
726 if (Ty == IceType_i16) {
727 EmitUint8(0xD1);
728 } else if (Ty == IceType_f64) {
729 EmitUint8(0xD3);
730 } else {
731 assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
732 EmitUint8(0xD2);
733 }
734 EmitOperand(dst, src);
735 }
736
737 void AssemblerX86::psrl(Type Ty, XmmRegister dst, const Immediate &imm) {
738 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
739 assert(imm.is_int8());
740 EmitUint8(0x66);
741 EmitUint8(0x0F);
742 if (Ty == IceType_i16) {
743 EmitUint8(0x71);
744 } else if (Ty == IceType_f64) {
745 EmitUint8(0x73);
746 } else {
747 assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
748 EmitUint8(0x72);
749 }
750 EmitRegisterOperand(2, dst);
751 EmitUint8(imm.value() & 0xFF);
752 }
753
707 // {add,sub,mul,div}ps are given a Ty parameter for consistency with 754 // {add,sub,mul,div}ps are given a Ty parameter for consistency with
708 // {add,sub,mul,div}ss. In the future, when the PNaCl ABI allows 755 // {add,sub,mul,div}ss. In the future, when the PNaCl ABI allows
709 // addpd, etc., we can use the Ty parameter to decide on adding 756 // addpd, etc., we can use the Ty parameter to decide on adding
710 // a 0x66 prefix. 757 // a 0x66 prefix.
711 void AssemblerX86::addps(Type /* Ty */, XmmRegister dst, XmmRegister src) { 758 void AssemblerX86::addps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
712 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 759 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
713 EmitUint8(0x0F); 760 EmitUint8(0x0F);
714 EmitUint8(0x58); 761 EmitUint8(0x58);
715 EmitXmmRegisterOperand(dst, src); 762 EmitXmmRegisterOperand(dst, src);
716 } 763 }
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2514 assert(shifter == RegX8632::Encoded_Reg_ecx); 2561 assert(shifter == RegX8632::Encoded_Reg_ecx);
2515 (void)shifter; 2562 (void)shifter;
2516 if (Ty == IceType_i16) 2563 if (Ty == IceType_i16)
2517 EmitOperandSizeOverride(); 2564 EmitOperandSizeOverride();
2518 EmitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3); 2565 EmitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
2519 EmitOperand(rm, operand); 2566 EmitOperand(rm, operand);
2520 } 2567 }
2521 2568
2522 } // end of namespace x86 2569 } // end of namespace x86
2523 } // end of namespace Ice 2570 } // end of namespace Ice
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