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Issue 1021533002: [ARM64] [turbofan] Support uxtb/uxth for add/sub. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Small fix. Created 5 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm64/macro-assembler-arm64.h" 7 #include "src/arm64/macro-assembler-arm64.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
(...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after
64 case kMode_None: 64 case kMode_None:
65 return InputOperand32(index); 65 return InputOperand32(index);
66 case kMode_Operand2_R_LSL_I: 66 case kMode_Operand2_R_LSL_I:
67 return Operand(InputRegister32(index), LSL, InputInt5(index + 1)); 67 return Operand(InputRegister32(index), LSL, InputInt5(index + 1));
68 case kMode_Operand2_R_LSR_I: 68 case kMode_Operand2_R_LSR_I:
69 return Operand(InputRegister32(index), LSR, InputInt5(index + 1)); 69 return Operand(InputRegister32(index), LSR, InputInt5(index + 1));
70 case kMode_Operand2_R_ASR_I: 70 case kMode_Operand2_R_ASR_I:
71 return Operand(InputRegister32(index), ASR, InputInt5(index + 1)); 71 return Operand(InputRegister32(index), ASR, InputInt5(index + 1));
72 case kMode_Operand2_R_ROR_I: 72 case kMode_Operand2_R_ROR_I:
73 return Operand(InputRegister32(index), ROR, InputInt5(index + 1)); 73 return Operand(InputRegister32(index), ROR, InputInt5(index + 1));
74 case kMode_Operand2_R_UXTB:
75 return Operand(InputRegister32(index), UXTB);
76 case kMode_Operand2_R_UXTH:
77 return Operand(InputRegister32(index), UXTH);
74 case kMode_MRI: 78 case kMode_MRI:
75 case kMode_MRR: 79 case kMode_MRR:
76 break; 80 break;
77 } 81 }
78 UNREACHABLE(); 82 UNREACHABLE();
79 return Operand(-1); 83 return Operand(-1);
80 } 84 }
81 85
82 Operand InputOperand2_64(size_t index) { 86 Operand InputOperand2_64(size_t index) {
83 switch (AddressingModeField::decode(instr_->opcode())) { 87 switch (AddressingModeField::decode(instr_->opcode())) {
84 case kMode_None: 88 case kMode_None:
85 return InputOperand64(index); 89 return InputOperand64(index);
86 case kMode_Operand2_R_LSL_I: 90 case kMode_Operand2_R_LSL_I:
87 return Operand(InputRegister64(index), LSL, InputInt6(index + 1)); 91 return Operand(InputRegister64(index), LSL, InputInt6(index + 1));
88 case kMode_Operand2_R_LSR_I: 92 case kMode_Operand2_R_LSR_I:
89 return Operand(InputRegister64(index), LSR, InputInt6(index + 1)); 93 return Operand(InputRegister64(index), LSR, InputInt6(index + 1));
90 case kMode_Operand2_R_ASR_I: 94 case kMode_Operand2_R_ASR_I:
91 return Operand(InputRegister64(index), ASR, InputInt6(index + 1)); 95 return Operand(InputRegister64(index), ASR, InputInt6(index + 1));
92 case kMode_Operand2_R_ROR_I: 96 case kMode_Operand2_R_ROR_I:
93 return Operand(InputRegister64(index), ROR, InputInt6(index + 1)); 97 return Operand(InputRegister64(index), ROR, InputInt6(index + 1));
98 case kMode_Operand2_R_UXTB:
99 return Operand(InputRegister64(index), UXTB);
100 case kMode_Operand2_R_UXTH:
101 return Operand(InputRegister64(index), UXTH);
94 case kMode_MRI: 102 case kMode_MRI:
95 case kMode_MRR: 103 case kMode_MRR:
96 break; 104 break;
97 } 105 }
98 UNREACHABLE(); 106 UNREACHABLE();
99 return Operand(-1); 107 return Operand(-1);
100 } 108 }
101 109
102 MemOperand MemoryOperand(size_t* first_index) { 110 MemOperand MemoryOperand(size_t* first_index) {
103 const size_t index = *first_index; 111 const size_t index = *first_index;
104 switch (AddressingModeField::decode(instr_->opcode())) { 112 switch (AddressingModeField::decode(instr_->opcode())) {
105 case kMode_None: 113 case kMode_None:
106 case kMode_Operand2_R_LSL_I: 114 case kMode_Operand2_R_LSL_I:
107 case kMode_Operand2_R_LSR_I: 115 case kMode_Operand2_R_LSR_I:
108 case kMode_Operand2_R_ASR_I: 116 case kMode_Operand2_R_ASR_I:
109 case kMode_Operand2_R_ROR_I: 117 case kMode_Operand2_R_ROR_I:
118 case kMode_Operand2_R_UXTB:
119 case kMode_Operand2_R_UXTH:
110 break; 120 break;
111 case kMode_MRI: 121 case kMode_MRI:
112 *first_index += 2; 122 *first_index += 2;
113 return MemOperand(InputRegister(index + 0), InputInt32(index + 1)); 123 return MemOperand(InputRegister(index + 0), InputInt32(index + 1));
114 case kMode_MRR: 124 case kMode_MRR:
115 *first_index += 2; 125 *first_index += 2;
116 return MemOperand(InputRegister(index + 0), InputRegister(index + 1)); 126 return MemOperand(InputRegister(index + 0), InputRegister(index + 1));
117 } 127 }
118 UNREACHABLE(); 128 UNREACHABLE();
119 return MemOperand(no_reg); 129 return MemOperand(no_reg);
(...skipping 1076 matching lines...) Expand 10 before | Expand all | Expand 10 after
1196 } 1206 }
1197 } 1207 }
1198 MarkLazyDeoptSite(); 1208 MarkLazyDeoptSite();
1199 } 1209 }
1200 1210
1201 #undef __ 1211 #undef __
1202 1212
1203 } // namespace compiler 1213 } // namespace compiler
1204 } // namespace internal 1214 } // namespace internal
1205 } // namespace v8 1215 } // namespace v8
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