Index: test/unittests/compiler/arm/instruction-selector-arm-unittest.cc |
diff --git a/test/unittests/compiler/arm/instruction-selector-arm-unittest.cc b/test/unittests/compiler/arm/instruction-selector-arm-unittest.cc |
index 1fa0b10842f849e2a51b88c3ade8c39938f3e7c4..85e52488b478411160bc8dccfc5a055692ce21d5 100644 |
--- a/test/unittests/compiler/arm/instruction-selector-arm-unittest.cc |
+++ b/test/unittests/compiler/arm/instruction-selector-arm-unittest.cc |
@@ -2426,6 +2426,21 @@ TEST_F(InstructionSelectorTest, Word32AndWithWord32ShrWithImmediateForARMv7) { |
} |
} |
+ |
+TEST_F(InstructionSelectorTest, Word32Clz) { |
+ StreamBuilder m(this, kMachUint32, kMachUint32); |
+ Node* const p0 = m.Parameter(0); |
+ Node* const n = m.Word32Clz(p0); |
+ m.Return(n); |
+ Stream s = m.Build(); |
+ ASSERT_EQ(1U, s.size()); |
+ EXPECT_EQ(kArmClz, s[0]->arch_opcode()); |
+ ASSERT_EQ(1U, s[0]->InputCount()); |
+ EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); |
+ ASSERT_EQ(1U, s[0]->OutputCount()); |
+ EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); |
+} |
+ |
} // namespace compiler |
} // namespace internal |
} // namespace v8 |