Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(423)

Side by Side Diff: src/compiler/arm/instruction-codes-arm.h

Issue 1021183002: [turbofan] Turn Math.clz32 into an inlinable builtin. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/compiler/arm/code-generator-arm.cc ('k') | src/compiler/arm/instruction-selector-arm.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
11 11
12 // ARM-specific opcodes that specify which assembly sequence to emit. 12 // ARM-specific opcodes that specify which assembly sequence to emit.
13 // Most opcodes specify a single instruction. 13 // Most opcodes specify a single instruction.
14 #define TARGET_ARCH_OPCODE_LIST(V) \ 14 #define TARGET_ARCH_OPCODE_LIST(V) \
15 V(ArmAdd) \ 15 V(ArmAdd) \
16 V(ArmAnd) \ 16 V(ArmAnd) \
17 V(ArmBic) \ 17 V(ArmBic) \
18 V(ArmClz) \
18 V(ArmCmp) \ 19 V(ArmCmp) \
19 V(ArmCmn) \ 20 V(ArmCmn) \
20 V(ArmTst) \ 21 V(ArmTst) \
21 V(ArmTeq) \ 22 V(ArmTeq) \
22 V(ArmOrr) \ 23 V(ArmOrr) \
23 V(ArmEor) \ 24 V(ArmEor) \
24 V(ArmSub) \ 25 V(ArmSub) \
25 V(ArmRsb) \ 26 V(ArmRsb) \
26 V(ArmMul) \ 27 V(ArmMul) \
27 V(ArmMla) \ 28 V(ArmMla) \
(...skipping 72 matching lines...) Expand 10 before | Expand all | Expand 10 after
100 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ 101 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \
101 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ 102 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \
102 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ 103 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \
103 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ 104 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */
104 105
105 } // namespace compiler 106 } // namespace compiler
106 } // namespace internal 107 } // namespace internal
107 } // namespace v8 108 } // namespace v8
108 109
109 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 110 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
OLDNEW
« no previous file with comments | « src/compiler/arm/code-generator-arm.cc ('k') | src/compiler/arm/instruction-selector-arm.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698