Specialize Sk2d for ARM64

src/opts/Sk4x_neon.h

 // It is important _not_ to put header guards here.
 // This file will be intentionally included three times.
 
 #include "SkTypes.h"  // Keep this before any #ifdef for skbug.com/3362
 
 #if defined(SK4X_PREAMBLE)
     #include <arm_neon.h>
 
     // Template metaprogramming to map scalar types to vector types.
     template <typename T> struct SkScalarToSIMD;
@@ skipping 19 matching lines @@
 template <typename T> Sk4x<T>::Sk4x(const Sk4x& other) { *this = other; }
 template <typename T> Sk4x<T>& Sk4x<T>::operator=(const Sk4x<T>& other) {
     fVec = other.fVec;
     return *this;
 }
 
 // Sk4f Methods
 #define M(...) template <> inline __VA_ARGS__ Sk4f::
 
 M() Sk4x(float v) : fVec(vdupq_n_f32(v)) {}
-M() Sk4x(float a, float b, float c, float d) {
-    // NEON lacks an intrinsic to make this easy.  It is recommended to avoid
-    // this constructor unless it is absolutely necessary.
-
-    // I am choosing to use the set lane intrinsics.  Particularly, in the case
-    // of floating point, it is likely that the values are already in the right
-    // register file, so this may be the best approach.  However, I am not
-    // certain that this is the fastest approach and experimentation might be
-    // useful.
-    fVec = vsetq_lane_f32(a, fVec, 0);
-    fVec = vsetq_lane_f32(b, fVec, 1);
-    fVec = vsetq_lane_f32(c, fVec, 2);
-    fVec = vsetq_lane_f32(d, fVec, 3);
-}
+M() Sk4x(float a, float b, float c, float d) { fVec = (float32x4_t) { a, b, c, d }; }
 
 // As far as I can tell, it's not possible to provide an alignment hint to
 // NEON using intrinsics.  However, I think it is possible at the assembly
 // level if we want to get into that.
 // TODO: Write our own aligned load and store.
 M(Sk4f) Load       (const float fs[4]) { return vld1q_f32(fs); }
 M(Sk4f) LoadAligned(const float fs[4]) { return vld1q_f32(fs); }
 M(void) store       (float fs[4]) const { vst1q_f32(fs, fVec); }
 M(void) storeAligned(float fs[4]) const { vst1q_f32 (fs, fVec); }
 
@@ skipping 59 matching lines @@
     float32x4x2_t xayb_zcwd = vzipq_f32(xyzw.fVec, abcd.fVec);
     float32x4x2_t axby_czdw = vzipq_f32(abcd.fVec, xyzw.fVec);
     return vuzpq_f32(xayb_zcwd.val[1], axby_czdw.val[1]).val[0];
 }
 
 // Sk4i Methods
 #undef M
 #define M(...) template <> inline __VA_ARGS__ Sk4i::
 
 M() Sk4x(int32_t v) : fVec(vdupq_n_s32(v)) {}
-M() Sk4x(int32_t a, int32_t b, int32_t c, int32_t d) {
-    // NEON lacks an intrinsic to make this easy.  It is recommended to avoid
-    // this constructor unless it is absolutely necessary.
-
-    // There are a few different implementation strategies.
-
-    // uint64_t ab_i = ((uint32_t) a) | (((uint64_t) b) << 32);
-    // uint64_t cd_i = ((uint32_t) c) | (((uint64_t) d) << 32);
-    // int32x2_t ab = vcreate_s32(ab_i);
-    // int32x2_t cd = vcreate_s32(cd_i);
-    // fVec = vcombine_s32(ab, cd);
-    // This might not be a bad idea for the integer case.  Either way I think,
-    // we will need to move values from general registers to NEON registers.
-
-    // I am choosing to use the set lane intrinsics.  I am not certain that
-    // this is the fastest approach.  It may be useful to try the above code
-    // for integers.
-    fVec = vsetq_lane_s32(a, fVec, 0);
-    fVec = vsetq_lane_s32(b, fVec, 1);
-    fVec = vsetq_lane_s32(c, fVec, 2);
-    fVec = vsetq_lane_s32(d, fVec, 3);
-}
+M() Sk4x(int32_t a, int32_t b, int32_t c, int32_t d) { fVec = (int32x4_t) { a, b, c, d }; }
 
 // As far as I can tell, it's not possible to provide an alignment hint to
 // NEON using intrinsics.  However, I think it is possible at the assembly
 // level if we want to get into that.
 M(Sk4i) Load       (const int32_t is[4]) { return vld1q_s32(is); }
 M(Sk4i) LoadAligned(const int32_t is[4]) { return vld1q_s32(is); }
 M(void) store       (int32_t is[4]) const { vst1q_s32(is, fVec); }
 M(void) storeAligned(int32_t is[4]) const { vst1q_s32 (is, fVec); }
 
 template <>
@@ skipping 52 matching lines @@
 }
 M(Sk4i) ZWCD(const Sk4i& xyzw, const Sk4i& abcd) {
     int32x4x2_t xayb_zcwd = vzipq_s32(xyzw.fVec, abcd.fVec);
     int32x4x2_t axby_czdw = vzipq_s32(abcd.fVec, xyzw.fVec);
     return vuzpq_s32(xayb_zcwd.val[1], axby_czdw.val[1]).val[0];
 }
 
 #undef M
 
 #endif