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Side by Side Diff: src/compiler/mips64/instruction-codes-mips64.h

Issue 1020223002: MIPS: [turbofan] Turn Math.clz32 into an inlinable builtin. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 13 matching lines...) Expand all
24 V(Mips64Ddiv) \ 24 V(Mips64Ddiv) \
25 V(Mips64DivU) \ 25 V(Mips64DivU) \
26 V(Mips64DdivU) \ 26 V(Mips64DdivU) \
27 V(Mips64Mod) \ 27 V(Mips64Mod) \
28 V(Mips64Dmod) \ 28 V(Mips64Dmod) \
29 V(Mips64ModU) \ 29 V(Mips64ModU) \
30 V(Mips64DmodU) \ 30 V(Mips64DmodU) \
31 V(Mips64And) \ 31 V(Mips64And) \
32 V(Mips64Or) \ 32 V(Mips64Or) \
33 V(Mips64Xor) \ 33 V(Mips64Xor) \
34 V(Mips64Clz) \
34 V(Mips64Shl) \ 35 V(Mips64Shl) \
35 V(Mips64Shr) \ 36 V(Mips64Shr) \
36 V(Mips64Sar) \ 37 V(Mips64Sar) \
37 V(Mips64Ext) \ 38 V(Mips64Ext) \
38 V(Mips64Dext) \ 39 V(Mips64Dext) \
39 V(Mips64Dshl) \ 40 V(Mips64Dshl) \
40 V(Mips64Dshr) \ 41 V(Mips64Dshr) \
41 V(Mips64Dsar) \ 42 V(Mips64Dsar) \
42 V(Mips64Ror) \ 43 V(Mips64Ror) \
43 V(Mips64Dror) \ 44 V(Mips64Dror) \
(...skipping 57 matching lines...) Expand 10 before | Expand all | Expand 10 after
101 #define TARGET_ADDRESSING_MODE_LIST(V) \ 102 #define TARGET_ADDRESSING_MODE_LIST(V) \
102 V(MRI) /* [%r0 + K] */ \ 103 V(MRI) /* [%r0 + K] */ \
103 V(MRR) /* [%r0 + %r1] */ 104 V(MRR) /* [%r0 + %r1] */
104 105
105 106
106 } // namespace compiler 107 } // namespace compiler
107 } // namespace internal 108 } // namespace internal
108 } // namespace v8 109 } // namespace v8
109 110
110 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 111 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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