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Side by Side Diff: src/compiler/mips64/code-generator-mips64.cc

Issue 1020223002: MIPS: [turbofan] Turn Math.clz32 into an inlinable builtin. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 #include "src/compiler/code-generator-impl.h" 6 #include "src/compiler/code-generator-impl.h"
7 #include "src/compiler/gap-resolver.h" 7 #include "src/compiler/gap-resolver.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/mips/macro-assembler-mips.h" 9 #include "src/mips/macro-assembler-mips.h"
10 #include "src/scopes.h" 10 #include "src/scopes.h"
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504 break; 504 break;
505 case kMips64And: 505 case kMips64And:
506 __ And(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 506 __ And(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
507 break; 507 break;
508 case kMips64Or: 508 case kMips64Or:
509 __ Or(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 509 __ Or(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
510 break; 510 break;
511 case kMips64Xor: 511 case kMips64Xor:
512 __ Xor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 512 __ Xor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
513 break; 513 break;
514 case kMips64Clz:
515 __ Clz(i.OutputRegister(), i.InputRegister(0));
516 break;
514 case kMips64Shl: 517 case kMips64Shl:
515 if (instr->InputAt(1)->IsRegister()) { 518 if (instr->InputAt(1)->IsRegister()) {
516 __ sllv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); 519 __ sllv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
517 } else { 520 } else {
518 int32_t imm = i.InputOperand(1).immediate(); 521 int32_t imm = i.InputOperand(1).immediate();
519 __ sll(i.OutputRegister(), i.InputRegister(0), imm); 522 __ sll(i.OutputRegister(), i.InputRegister(0), imm);
520 } 523 }
521 break; 524 break;
522 case kMips64Shr: 525 case kMips64Shr:
523 if (instr->InputAt(1)->IsRegister()) { 526 if (instr->InputAt(1)->IsRegister()) {
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1283 } 1286 }
1284 } 1287 }
1285 MarkLazyDeoptSite(); 1288 MarkLazyDeoptSite();
1286 } 1289 }
1287 1290
1288 #undef __ 1291 #undef __
1289 1292
1290 } // namespace compiler 1293 } // namespace compiler
1291 } // namespace internal 1294 } // namespace internal
1292 } // namespace v8 1295 } // namespace v8
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