Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(694)

Side by Side Diff: src/compiler/mips/instruction-codes-mips.h

Issue 1020223002: MIPS: [turbofan] Turn Math.clz32 into an inlinable builtin. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
11 11
12 // MIPS-specific opcodes that specify which assembly sequence to emit. 12 // MIPS-specific opcodes that specify which assembly sequence to emit.
13 // Most opcodes specify a single instruction. 13 // Most opcodes specify a single instruction.
14 #define TARGET_ARCH_OPCODE_LIST(V) \ 14 #define TARGET_ARCH_OPCODE_LIST(V) \
15 V(MipsAdd) \ 15 V(MipsAdd) \
16 V(MipsAddOvf) \ 16 V(MipsAddOvf) \
17 V(MipsSub) \ 17 V(MipsSub) \
18 V(MipsSubOvf) \ 18 V(MipsSubOvf) \
19 V(MipsMul) \ 19 V(MipsMul) \
20 V(MipsMulHigh) \ 20 V(MipsMulHigh) \
21 V(MipsMulHighU) \ 21 V(MipsMulHighU) \
22 V(MipsDiv) \ 22 V(MipsDiv) \
23 V(MipsDivU) \ 23 V(MipsDivU) \
24 V(MipsMod) \ 24 V(MipsMod) \
25 V(MipsModU) \ 25 V(MipsModU) \
26 V(MipsAnd) \ 26 V(MipsAnd) \
27 V(MipsOr) \ 27 V(MipsOr) \
28 V(MipsXor) \ 28 V(MipsXor) \
29 V(MipsClz) \
29 V(MipsShl) \ 30 V(MipsShl) \
30 V(MipsShr) \ 31 V(MipsShr) \
31 V(MipsSar) \ 32 V(MipsSar) \
32 V(MipsRor) \ 33 V(MipsRor) \
33 V(MipsMov) \ 34 V(MipsMov) \
34 V(MipsTst) \ 35 V(MipsTst) \
35 V(MipsCmp) \ 36 V(MipsCmp) \
36 V(MipsCmpD) \ 37 V(MipsCmpD) \
37 V(MipsAddD) \ 38 V(MipsAddD) \
38 V(MipsSubD) \ 39 V(MipsSubD) \
(...skipping 49 matching lines...) Expand 10 before | Expand all | Expand 10 after
88 #define TARGET_ADDRESSING_MODE_LIST(V) \ 89 #define TARGET_ADDRESSING_MODE_LIST(V) \
89 V(MRI) /* [%r0 + K] */ \ 90 V(MRI) /* [%r0 + K] */ \
90 V(MRR) /* [%r0 + %r1] */ 91 V(MRR) /* [%r0 + %r1] */
91 92
92 93
93 } // namespace compiler 94 } // namespace compiler
94 } // namespace internal 95 } // namespace internal
95 } // namespace v8 96 } // namespace v8
96 97
97 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 98 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
OLDNEW
« no previous file with comments | « src/compiler/mips/code-generator-mips.cc ('k') | src/compiler/mips/instruction-selector-mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698