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Side by Side Diff: src/compiler/mips/instruction-selector-mips.cc

Issue 1019803005: [turbofan] Factor out common switch-related code in instruction selectors. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/bits.h" 5 #include "src/base/bits.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/compiler/node-properties.h" 8 #include "src/compiler/node-properties.h"
9 9
10 namespace v8 { 10 namespace v8 {
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764 } 764 }
765 765
766 766
767 void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch, 767 void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
768 BasicBlock* fbranch) { 768 BasicBlock* fbranch) {
769 FlagsContinuation cont(kNotEqual, tbranch, fbranch); 769 FlagsContinuation cont(kNotEqual, tbranch, fbranch);
770 VisitWordCompareZero(this, branch, branch->InputAt(0), &cont); 770 VisitWordCompareZero(this, branch, branch->InputAt(0), &cont);
771 } 771 }
772 772
773 773
774 void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch, 774 void InstructionSelector::VisitSwitch(Node* node, const SwitchInfo& sw) {
775 BasicBlock** case_branches,
776 int32_t* case_values, size_t case_count,
777 int32_t min_value, int32_t max_value) {
778 MipsOperandGenerator g(this); 775 MipsOperandGenerator g(this);
779 InstructionOperand value_operand = g.UseRegister(node->InputAt(0)); 776 InstructionOperand value_operand = g.UseRegister(node->InputAt(0));
780 InstructionOperand default_operand = g.Label(default_branch);
781 777
782 // Note that {value_range} can be 0 if {min_value} is -2^31 and {max_value} 778 // Emit either ArchTableSwitch or ArchLookupSwitch.
783 // is 2^31-1, so don't assume that it's non-zero below. 779 size_t table_space_cost = 9 + sw.value_range;
784 size_t value_range =
785 1u + bit_cast<uint32_t>(max_value) - bit_cast<uint32_t>(min_value);
786
787 // Determine whether to issue an ArchTableSwitch or an ArchLookupSwitch
788 // instruction.
789 size_t table_space_cost = 9 + value_range;
790 size_t table_time_cost = 3; 780 size_t table_time_cost = 3;
791 size_t lookup_space_cost = 2 + 2 * case_count; 781 size_t lookup_space_cost = 2 + 2 * sw.case_count;
792 size_t lookup_time_cost = case_count; 782 size_t lookup_time_cost = sw.case_count;
793 if (case_count > 0 && 783 if (sw.case_count > 0 &&
794 table_space_cost + 3 * table_time_cost <= 784 table_space_cost + 3 * table_time_cost <=
795 lookup_space_cost + 3 * lookup_time_cost && 785 lookup_space_cost + 3 * lookup_time_cost &&
796 min_value > std::numeric_limits<int32_t>::min()) { 786 sw.min_value > std::numeric_limits<int32_t>::min()) {
797 InstructionOperand index_operand = value_operand; 787 InstructionOperand index_operand = value_operand;
798 if (min_value) { 788 if (min_value) {
799 index_operand = g.TempRegister(); 789 index_operand = g.TempRegister();
800 Emit(kMipsSub, index_operand, value_operand, g.TempImmediate(min_value)); 790 Emit(kMipsSub, index_operand, value_operand,
791 g.TempImmediate(sw.min_value));
801 } 792 }
802 size_t input_count = 2 + value_range; 793 // Generate a table lookup.
803 auto* inputs = zone()->NewArray<InstructionOperand>(input_count); 794 return EmitTableSwitch(sw, index_operand);
804 inputs[0] = index_operand;
805 std::fill(&inputs[1], &inputs[input_count], default_operand);
806 for (size_t index = 0; index < case_count; ++index) {
807 size_t value = case_values[index] - min_value;
808 BasicBlock* branch = case_branches[index];
809 DCHECK_LE(0u, value);
810 DCHECK_LT(value + 2, input_count);
811 inputs[value + 2] = g.Label(branch);
812 }
813 Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
814 return;
815 } 795 }
816 796
817 // Generate a sequence of conditional jumps. 797 // Generate a sequence of conditional jumps.
818 size_t input_count = 2 + case_count * 2; 798 return EmitLookupSwitch(sw, value_operand);
819 auto* inputs = zone()->NewArray<InstructionOperand>(input_count);
820 inputs[0] = value_operand;
821 inputs[1] = default_operand;
822 for (size_t index = 0; index < case_count; ++index) {
823 int32_t value = case_values[index];
824 BasicBlock* branch = case_branches[index];
825 inputs[index * 2 + 2 + 0] = g.TempImmediate(value);
826 inputs[index * 2 + 2 + 1] = g.Label(branch);
827 }
828 Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
829 } 799 }
830 800
831 801
832 void InstructionSelector::VisitWord32Equal(Node* const node) { 802 void InstructionSelector::VisitWord32Equal(Node* const node) {
833 FlagsContinuation cont(kEqual, node); 803 FlagsContinuation cont(kEqual, node);
834 Int32BinopMatcher m(node); 804 Int32BinopMatcher m(node);
835 if (m.right().Is(0)) { 805 if (m.right().Is(0)) {
836 return VisitWordCompareZero(this, m.node(), m.left().node(), &cont); 806 return VisitWordCompareZero(this, m.node(), m.left().node(), &cont);
837 } 807 }
838 VisitWordCompare(this, node, &cont); 808 VisitWordCompare(this, node, &cont);
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939 if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) { 909 if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) {
940 return MachineOperatorBuilder::kFloat64RoundDown | 910 return MachineOperatorBuilder::kFloat64RoundDown |
941 MachineOperatorBuilder::kFloat64RoundTruncate; 911 MachineOperatorBuilder::kFloat64RoundTruncate;
942 } 912 }
943 return MachineOperatorBuilder::kNoFlags; 913 return MachineOperatorBuilder::kNoFlags;
944 } 914 }
945 915
946 } // namespace compiler 916 } // namespace compiler
947 } // namespace internal 917 } // namespace internal
948 } // namespace v8 918 } // namespace v8
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