Index: src/mips64/macro-assembler-mips64.cc |
diff --git a/src/mips64/macro-assembler-mips64.cc b/src/mips64/macro-assembler-mips64.cc |
index 79083646acd1a21abe2802216524207575448405..dd99d3e607465508beb327ef4ec01f2b9db21a77 100644 |
--- a/src/mips64/macro-assembler-mips64.cc |
+++ b/src/mips64/macro-assembler-mips64.cc |
@@ -2122,7 +2122,7 @@ void MacroAssembler::BranchShort(int16_t offset, Condition cond, Register rs, |
// Unsigned comparison. |
case Ugreater: |
if (r2.is(zero_reg)) { |
- bgtz(rs, offset); |
+ bne(rs, zero_reg, offset); |
} else { |
sltu(scratch, r2, rs); |
bne(scratch, zero_reg, offset); |
@@ -2130,7 +2130,7 @@ void MacroAssembler::BranchShort(int16_t offset, Condition cond, Register rs, |
break; |
case Ugreater_equal: |
if (r2.is(zero_reg)) { |
- bgez(rs, offset); |
+ b(offset); |
} else { |
sltu(scratch, rs, r2); |
beq(scratch, zero_reg, offset); |
@@ -2147,7 +2147,7 @@ void MacroAssembler::BranchShort(int16_t offset, Condition cond, Register rs, |
break; |
case Uless_equal: |
if (r2.is(zero_reg)) { |
- b(offset); |
+ beq(rs, zero_reg, offset); |
} else { |
sltu(scratch, r2, rs); |
beq(scratch, zero_reg, offset); |
@@ -2237,7 +2237,7 @@ void MacroAssembler::BranchShort(int16_t offset, Condition cond, Register rs, |
// Unsigned comparison. |
case Ugreater: |
if (rt.imm64_ == 0) { |
- bgtz(rs, offset); |
+ bne(rs, zero_reg, offset); |
} else { |
r2 = scratch; |
li(r2, rt); |
@@ -2247,7 +2247,7 @@ void MacroAssembler::BranchShort(int16_t offset, Condition cond, Register rs, |
break; |
case Ugreater_equal: |
if (rt.imm64_ == 0) { |
- bgez(rs, offset); |
+ b(offset); |
} else if (is_int16(rt.imm64_)) { |
sltiu(scratch, rs, rt.imm64_); |
beq(scratch, zero_reg, offset); |
@@ -2274,7 +2274,7 @@ void MacroAssembler::BranchShort(int16_t offset, Condition cond, Register rs, |
break; |
case Uless_equal: |
if (rt.imm64_ == 0) { |
- b(offset); |
+ beq(rs, zero_reg, offset); |
} else { |
r2 = scratch; |
li(r2, rt); |
@@ -2376,7 +2376,7 @@ void MacroAssembler::BranchShort(Label* L, Condition cond, Register rs, |
case Ugreater: |
if (r2.is(zero_reg)) { |
offset = shifted_branch_offset(L, false); |
- bgtz(rs, offset); |
+ bne(rs, zero_reg, offset); |
} else { |
sltu(scratch, r2, rs); |
offset = shifted_branch_offset(L, false); |
@@ -2386,7 +2386,7 @@ void MacroAssembler::BranchShort(Label* L, Condition cond, Register rs, |
case Ugreater_equal: |
if (r2.is(zero_reg)) { |
offset = shifted_branch_offset(L, false); |
- bgez(rs, offset); |
+ b(offset); |
} else { |
sltu(scratch, rs, r2); |
offset = shifted_branch_offset(L, false); |
@@ -2406,7 +2406,7 @@ void MacroAssembler::BranchShort(Label* L, Condition cond, Register rs, |
case Uless_equal: |
if (r2.is(zero_reg)) { |
offset = shifted_branch_offset(L, false); |
- b(offset); |
+ beq(rs, zero_reg, offset); |
} else { |
sltu(scratch, r2, rs); |
offset = shifted_branch_offset(L, false); |
@@ -2528,7 +2528,7 @@ void MacroAssembler::BranchShort(Label* L, Condition cond, Register rs, |
case Ugreater_equal: |
if (rt.imm64_ == 0) { |
offset = shifted_branch_offset(L, false); |
- bgez(rs, offset); |
+ b(offset); |
} else if (is_int16(rt.imm64_)) { |
sltiu(scratch, rs, rt.imm64_); |
offset = shifted_branch_offset(L, false); |