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Issue 1017453007: Subzero: Support non sequentially consistent memory orderings for atomic ops. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: More code review cleanup Created 5 years, 9 months ago
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1 //===- subzero/src/IceIntrinsics.h - List of Ice Intrinsics -----*- C++ -*-===// 1 //===- subzero/src/IceIntrinsics.h - List of Ice Intrinsics -----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file declares the kinds of intrinsics supported by PNaCl. 10 // This file declares the kinds of intrinsics supported by PNaCl.
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84 MemoryOrderInvalid = 0, // Invalid, keep first. 84 MemoryOrderInvalid = 0, // Invalid, keep first.
85 MemoryOrderRelaxed, 85 MemoryOrderRelaxed,
86 MemoryOrderConsume, 86 MemoryOrderConsume,
87 MemoryOrderAcquire, 87 MemoryOrderAcquire,
88 MemoryOrderRelease, 88 MemoryOrderRelease,
89 MemoryOrderAcquireRelease, 89 MemoryOrderAcquireRelease,
90 MemoryOrderSequentiallyConsistent, 90 MemoryOrderSequentiallyConsistent,
91 MemoryOrderNum // Invalid, keep last. 91 MemoryOrderNum // Invalid, keep last.
92 }; 92 };
93 93
94 static bool VerifyMemoryOrder(uint64_t Order); 94 // Verify memory ordering rules for atomic intrinsics. For
95 // AtomicCmpxchg, Order is the "success" ordering and OrderOther is
96 // the "failure" ordering. Returns true if valid, false if invalid.
97 // TODO(stichnot,kschimpf): Perform memory order validation in the
98 // bitcode reader/parser, allowing LLVM and Subzero to share. See
99 // https://code.google.com/p/nativeclient/issues/detail?id=4126 .
100 static bool isMemoryOrderValid(IntrinsicID ID, uint64_t Order,
101 uint64_t OrderOther = MemoryOrderInvalid);
95 102
96 enum SideEffects { SideEffects_F = 0, SideEffects_T = 1 }; 103 enum SideEffects { SideEffects_F = 0, SideEffects_T = 1 };
97 104
98 enum ReturnsTwice { ReturnsTwice_F = 0, ReturnsTwice_T = 1 }; 105 enum ReturnsTwice { ReturnsTwice_F = 0, ReturnsTwice_T = 1 };
99 106
100 // Basic attributes related to each intrinsic, that are relevant to 107 // Basic attributes related to each intrinsic, that are relevant to
101 // code generation. Perhaps the attributes representation can be shared 108 // code generation. Perhaps the attributes representation can be shared
102 // with general function calls, but PNaCl currently strips all 109 // with general function calls, but PNaCl currently strips all
103 // attributes from functions. 110 // attributes from functions.
104 struct IntrinsicInfo { 111 struct IntrinsicInfo {
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156 163
157 private: 164 private:
158 // TODO(jvoung): May want to switch to something like LLVM's StringMap. 165 // TODO(jvoung): May want to switch to something like LLVM's StringMap.
159 typedef std::map<IceString, FullIntrinsicInfo> IntrinsicMap; 166 typedef std::map<IceString, FullIntrinsicInfo> IntrinsicMap;
160 IntrinsicMap Map; 167 IntrinsicMap Map;
161 }; 168 };
162 169
163 } // end of namespace Ice 170 } // end of namespace Ice
164 171
165 #endif // SUBZERO_SRC_ICEINTRINSICS_H 172 #endif // SUBZERO_SRC_ICEINTRINSICS_H
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