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Side by Side Diff: src/mips/assembler-mips-inl.h

Issue 1014763003: MIPS: Support INTERNAL_REFERENCE_ENCODED in serializer. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: add mips64 port. Created 5 years, 9 months ago
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1 1
2 // Copyright (c) 1994-2006 Sun Microsystems Inc. 2 // Copyright (c) 1994-2006 Sun Microsystems Inc.
3 // All Rights Reserved. 3 // All Rights Reserved.
4 // 4 //
5 // Redistribution and use in source and binary forms, with or without 5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are 6 // modification, are permitted provided that the following conditions are
7 // met: 7 // met:
8 // 8 //
9 // - Redistributions of source code must retain the above copyright notice, 9 // - Redistributions of source code must retain the above copyright notice,
10 // this list of conditions and the following disclaimer. 10 // this list of conditions and the following disclaimer.
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229 } 229 }
230 230
231 231
232 Address RelocInfo::target_external_reference() { 232 Address RelocInfo::target_external_reference() {
233 DCHECK(rmode_ == EXTERNAL_REFERENCE); 233 DCHECK(rmode_ == EXTERNAL_REFERENCE);
234 return Assembler::target_address_at(pc_, host_); 234 return Assembler::target_address_at(pc_, host_);
235 } 235 }
236 236
237 237
238 Address RelocInfo::target_internal_reference() { 238 Address RelocInfo::target_internal_reference() {
239 DCHECK(rmode_ == INTERNAL_REFERENCE); 239 if (rmode_ == INTERNAL_REFERENCE) {
240 return Memory::Address_at(pc_); 240 return Memory::Address_at(pc_);
241 } else {
242 DCHECK(rmode_ == INTERNAL_REFERENCE_ENCODED);
243 Instr instr_lui = Assembler::instr_at(pc_ + 0 * Assembler::kInstrSize);
244 Instr instr_ori = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
245 DCHECK(Assembler::IsLui(instr_lui));
246 DCHECK(Assembler::IsOri(instr_ori));
247 int32_t imm = (instr_lui & static_cast<int32_t>(kImm16Mask)) << kLuiShift;
248 imm |= (instr_ori & static_cast<int32_t>(kImm16Mask));
249 return reinterpret_cast<Address>(imm);
250 }
241 } 251 }
242 252
243 253
244 void RelocInfo::set_target_internal_reference(Address target) { 254 void RelocInfo::set_target_internal_reference(Address target) {
245 DCHECK(rmode_ == INTERNAL_REFERENCE); 255 if (rmode_ == INTERNAL_REFERENCE) {
246 Memory::Address_at(pc_) = target; 256 Memory::Address_at(pc_) = target;
257 } else {
258 // Encoded internal references are lui/ori load of 32-bit abolute address.
259 DCHECK(rmode_ == INTERNAL_REFERENCE_ENCODED);
260 Instr instr_lui = Assembler::instr_at(pc_ + 0 * Assembler::kInstrSize);
261 Instr instr_ori = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
262 DCHECK(Assembler::IsLui(instr_lui));
263 DCHECK(Assembler::IsOri(instr_ori));
264 instr_lui &= ~kImm16Mask;
265 instr_ori &= ~kImm16Mask;
266 int32_t imm = reinterpret_cast<int32_t>(target);
267 DCHECK((imm & 3) == 0);
268 Assembler::instr_at_put(pc_ + 0 * Assembler::kInstrSize,
269 instr_lui | ((imm >> kLuiShift) & kImm16Mask));
270 Assembler::instr_at_put(pc_ + 1 * Assembler::kInstrSize,
271 instr_ori | (imm & kImm16Mask));
272 // Currently used only by deserializer, and all code will be flushed
273 // after complete deserialization, no need to flush on each reference.
274 }
247 } 275 }
248 276
249 277
250 Address RelocInfo::target_runtime_entry(Assembler* origin) { 278 Address RelocInfo::target_runtime_entry(Assembler* origin) {
251 DCHECK(IsRuntimeEntry(rmode_)); 279 DCHECK(IsRuntimeEntry(rmode_));
252 return target_address(); 280 return target_address();
253 } 281 }
254 282
255 283
256 void RelocInfo::set_target_runtime_entry(Address target, 284 void RelocInfo::set_target_runtime_entry(Address target,
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458 } 486 }
459 *reinterpret_cast<Instr*>(pc_) = x; 487 *reinterpret_cast<Instr*>(pc_) = x;
460 pc_ += kInstrSize; 488 pc_ += kInstrSize;
461 CheckTrampolinePoolQuick(); 489 CheckTrampolinePoolQuick();
462 } 490 }
463 491
464 492
465 } } // namespace v8::internal 493 } } // namespace v8::internal
466 494
467 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ 495 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_
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