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Side by Side Diff: src/compiler/arm64/instruction-codes-arm64.h

Issue 1013743006: [turbofan][arm64] Match fneg for -0.0 - x pattern. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 67 matching lines...) Expand 10 before | Expand all | Expand 10 after
78 V(Arm64Claim) \ 78 V(Arm64Claim) \
79 V(Arm64Poke) \ 79 V(Arm64Poke) \
80 V(Arm64PokePairZero) \ 80 V(Arm64PokePairZero) \
81 V(Arm64PokePair) \ 81 V(Arm64PokePair) \
82 V(Arm64Float64Cmp) \ 82 V(Arm64Float64Cmp) \
83 V(Arm64Float64Add) \ 83 V(Arm64Float64Add) \
84 V(Arm64Float64Sub) \ 84 V(Arm64Float64Sub) \
85 V(Arm64Float64Mul) \ 85 V(Arm64Float64Mul) \
86 V(Arm64Float64Div) \ 86 V(Arm64Float64Div) \
87 V(Arm64Float64Mod) \ 87 V(Arm64Float64Mod) \
88 V(Arm64Float64Neg) \
88 V(Arm64Float64Sqrt) \ 89 V(Arm64Float64Sqrt) \
89 V(Arm64Float64RoundDown) \ 90 V(Arm64Float64RoundDown) \
90 V(Arm64Float64RoundTiesAway) \ 91 V(Arm64Float64RoundTiesAway) \
91 V(Arm64Float64RoundTruncate) \ 92 V(Arm64Float64RoundTruncate) \
92 V(Arm64Float64RoundUp) \ 93 V(Arm64Float64RoundUp) \
93 V(Arm64Float32ToFloat64) \ 94 V(Arm64Float32ToFloat64) \
94 V(Arm64Float64ToFloat32) \ 95 V(Arm64Float64ToFloat32) \
95 V(Arm64Float64ToInt32) \ 96 V(Arm64Float64ToInt32) \
96 V(Arm64Float64ToUint32) \ 97 V(Arm64Float64ToUint32) \
97 V(Arm64Int32ToFloat64) \ 98 V(Arm64Int32ToFloat64) \
(...skipping 43 matching lines...) Expand 10 before | Expand all | Expand 10 after
141 V(Operand2_R_ASR_I) /* %r0 ASR K */ \ 142 V(Operand2_R_ASR_I) /* %r0 ASR K */ \
142 V(Operand2_R_ROR_I) /* %r0 ROR K */ \ 143 V(Operand2_R_ROR_I) /* %r0 ROR K */ \
143 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \ 144 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \
144 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */ 145 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */
145 146
146 } // namespace internal 147 } // namespace internal
147 } // namespace compiler 148 } // namespace compiler
148 } // namespace v8 149 } // namespace v8
149 150
150 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 151 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
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