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Issue 1006913002: PPC: Implement turbofan Float64Min and Float64Max machine operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 #include "src/compiler/node-properties.h" 7 #include "src/compiler/node-properties.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
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956 956
957 957
958 void InstructionSelector::VisitFloat64Mod(Node* node) { 958 void InstructionSelector::VisitFloat64Mod(Node* node) {
959 PPCOperandGenerator g(this); 959 PPCOperandGenerator g(this);
960 Emit(kPPC_ModFloat64, g.DefineAsFixed(node, d1), 960 Emit(kPPC_ModFloat64, g.DefineAsFixed(node, d1),
961 g.UseFixed(node->InputAt(0), d1), 961 g.UseFixed(node->InputAt(0), d1),
962 g.UseFixed(node->InputAt(1), d2))->MarkAsCall(); 962 g.UseFixed(node->InputAt(1), d2))->MarkAsCall();
963 } 963 }
964 964
965 965
966 void InstructionSelector::VisitFloat64Max(Node* node) { UNREACHABLE(); } 966 void InstructionSelector::VisitFloat64Max(Node* node) {
967 VisitRRRFloat64(this, node, kPPC_MaxFloat64);
968 }
967 969
968 970
969 void InstructionSelector::VisitFloat64Min(Node* node) { UNREACHABLE(); } 971 void InstructionSelector::VisitFloat64Min(Node* node) {
972 VisitRRRFloat64(this, node, kPPC_MinFloat64);
973 }
970 974
971 975
972 void InstructionSelector::VisitFloat64Sqrt(Node* node) { 976 void InstructionSelector::VisitFloat64Sqrt(Node* node) {
973 VisitRRFloat64(this, kPPC_SqrtFloat64, node); 977 VisitRRFloat64(this, kPPC_SqrtFloat64, node);
974 } 978 }
975 979
976 980
977 void InstructionSelector::VisitFloat64RoundDown(Node* node) { 981 void InstructionSelector::VisitFloat64RoundDown(Node* node) {
978 VisitRRFloat64(this, kPPC_FloorFloat64, node); 982 VisitRRFloat64(this, kPPC_FloorFloat64, node);
979 } 983 }
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1484 return; 1488 return;
1485 } 1489 }
1486 Emit(kPPC_Float64InsertHighWord32, g.DefineSameAsFirst(node), 1490 Emit(kPPC_Float64InsertHighWord32, g.DefineSameAsFirst(node),
1487 g.UseRegister(left), g.UseRegister(right)); 1491 g.UseRegister(left), g.UseRegister(right));
1488 } 1492 }
1489 1493
1490 1494
1491 // static 1495 // static
1492 MachineOperatorBuilder::Flags 1496 MachineOperatorBuilder::Flags
1493 InstructionSelector::SupportedMachineOperatorFlags() { 1497 InstructionSelector::SupportedMachineOperatorFlags() {
1494 return MachineOperatorBuilder::kFloat64RoundDown | 1498 return MachineOperatorBuilder::kFloat64Max |
1499 MachineOperatorBuilder::kFloat64Min |
1500 MachineOperatorBuilder::kFloat64RoundDown |
1495 MachineOperatorBuilder::kFloat64RoundTruncate | 1501 MachineOperatorBuilder::kFloat64RoundTruncate |
1496 MachineOperatorBuilder::kFloat64RoundTiesAway; 1502 MachineOperatorBuilder::kFloat64RoundTiesAway;
1497 // We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f. 1503 // We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f.
1498 } 1504 }
1499 1505
1500 } // namespace compiler 1506 } // namespace compiler
1501 } // namespace internal 1507 } // namespace internal
1502 } // namespace v8 1508 } // namespace v8
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