| Index: src/compiler/mips64/instruction-selector-mips64.cc
|
| diff --git a/src/compiler/mips64/instruction-selector-mips64.cc b/src/compiler/mips64/instruction-selector-mips64.cc
|
| index e75283093801ee169a3cb0e07000cb24761e4792..086aa93a7ccb405cb41b2bad74cc379db976124b 100644
|
| --- a/src/compiler/mips64/instruction-selector-mips64.cc
|
| +++ b/src/compiler/mips64/instruction-selector-mips64.cc
|
| @@ -1148,14 +1148,14 @@ void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) {
|
|
|
| void InstructionSelector::VisitFloat64ExtractLowWord32(Node* node) {
|
| Mips64OperandGenerator g(this);
|
| - Emit(kMips64FmoveLowUwD, g.DefineAsRegister(node),
|
| + Emit(kMips64Float64ExtractLowWord32, g.DefineAsRegister(node),
|
| g.UseRegister(node->InputAt(0)));
|
| }
|
|
|
|
|
| void InstructionSelector::VisitFloat64ExtractHighWord32(Node* node) {
|
| Mips64OperandGenerator g(this);
|
| - Emit(kMips64FmoveHighUwD, g.DefineAsRegister(node),
|
| + Emit(kMips64Float64ExtractHighWord32, g.DefineAsRegister(node),
|
| g.UseRegister(node->InputAt(0)));
|
| }
|
|
|
| @@ -1164,8 +1164,8 @@ void InstructionSelector::VisitFloat64InsertLowWord32(Node* node) {
|
| Mips64OperandGenerator g(this);
|
| Node* left = node->InputAt(0);
|
| Node* right = node->InputAt(1);
|
| - Emit(kMips64FmoveLowDUw, g.DefineSameAsFirst(node), g.UseRegister(left),
|
| - g.UseRegister(right));
|
| + Emit(kMips64Float64InsertLowWord32, g.DefineSameAsFirst(node),
|
| + g.UseRegister(left), g.UseRegister(right));
|
| }
|
|
|
|
|
| @@ -1173,8 +1173,8 @@ void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) {
|
| Mips64OperandGenerator g(this);
|
| Node* left = node->InputAt(0);
|
| Node* right = node->InputAt(1);
|
| - Emit(kMips64FmoveHighDUw, g.DefineSameAsFirst(node), g.UseRegister(left),
|
| - g.UseRegister(right));
|
| + Emit(kMips64Float64InsertHighWord32, g.DefineSameAsFirst(node),
|
| + g.UseRegister(left), g.UseRegister(right));
|
| }
|
|
|
|
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|
|