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Side by Side Diff: src/compiler/mips64/instruction-codes-mips64.h

Issue 1005123002: MIPS64: Unify and improve Word32 compares to use same instructions as Word64 compares. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 25 matching lines...) Expand all
36 V(Mips64Sar) \ 36 V(Mips64Sar) \
37 V(Mips64Ext) \ 37 V(Mips64Ext) \
38 V(Mips64Dext) \ 38 V(Mips64Dext) \
39 V(Mips64Dshl) \ 39 V(Mips64Dshl) \
40 V(Mips64Dshr) \ 40 V(Mips64Dshr) \
41 V(Mips64Dsar) \ 41 V(Mips64Dsar) \
42 V(Mips64Ror) \ 42 V(Mips64Ror) \
43 V(Mips64Dror) \ 43 V(Mips64Dror) \
44 V(Mips64Mov) \ 44 V(Mips64Mov) \
45 V(Mips64Tst) \ 45 V(Mips64Tst) \
46 V(Mips64Tst32) \
47 V(Mips64Cmp) \ 46 V(Mips64Cmp) \
48 V(Mips64Cmp32) \
49 V(Mips64CmpD) \ 47 V(Mips64CmpD) \
50 V(Mips64AddD) \ 48 V(Mips64AddD) \
51 V(Mips64SubD) \ 49 V(Mips64SubD) \
52 V(Mips64MulD) \ 50 V(Mips64MulD) \
53 V(Mips64DivD) \ 51 V(Mips64DivD) \
54 V(Mips64ModD) \ 52 V(Mips64ModD) \
55 V(Mips64SqrtD) \ 53 V(Mips64SqrtD) \
56 V(Mips64Float64RoundDown) \ 54 V(Mips64Float64RoundDown) \
57 V(Mips64Float64RoundTruncate) \ 55 V(Mips64Float64RoundTruncate) \
58 V(Mips64Float64RoundUp) \ 56 V(Mips64Float64RoundUp) \
(...skipping 44 matching lines...) Expand 10 before | Expand all | Expand 10 after
103 #define TARGET_ADDRESSING_MODE_LIST(V) \ 101 #define TARGET_ADDRESSING_MODE_LIST(V) \
104 V(MRI) /* [%r0 + K] */ \ 102 V(MRI) /* [%r0 + K] */ \
105 V(MRR) /* [%r0 + %r1] */ 103 V(MRR) /* [%r0 + %r1] */
106 104
107 105
108 } // namespace compiler 106 } // namespace compiler
109 } // namespace internal 107 } // namespace internal
110 } // namespace v8 108 } // namespace v8
111 109
112 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 110 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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