|
|
Uses a conditional move for usage counter increment instead of a branch
in the CheckInlineCacheStub.
This gives another small improvement in unoptimized code performance.
This change also reverts part of my last change that used
the conditional move on ia32 and x64 in the LoadClassIdInstr. This
made performance worse on those platforms for a couple of benchmarks.
R=srdjan@google.com
Committed: https://code.google.com/p/dart/source/detail?r=38126
Total comments: 5
|
Unified diffs |
Side-by-side diffs |
Delta from patch set |
Stats (+127 lines, -37 lines) |
Patch |
 |
M |
runtime/vm/assembler_ia32.h
|
View
|
|
1 chunk |
+1 line, -0 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/assembler_ia32.cc
|
View
|
|
1 chunk |
+9 lines, -0 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/assembler_ia32_test.cc
|
View
|
|
1 chunk |
+21 lines, -0 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/assembler_x64.h
|
View
|
|
1 chunk |
+1 line, -0 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/assembler_x64.cc
|
View
|
|
1 chunk |
+10 lines, -0 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/assembler_x64_test.cc
|
View
|
|
1 chunk |
+21 lines, -0 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/intermediate_language_ia32.cc
|
View
|
1
|
1 chunk |
+20 lines, -11 lines |
1 comment
|
Download
|
 |
M |
runtime/vm/intermediate_language_x64.cc
|
View
|
1
|
1 chunk |
+15 lines, -3 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/stub_code_arm.cc
|
View
|
|
1 chunk |
+3 lines, -3 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/stub_code_arm64.cc
|
View
|
|
1 chunk |
+4 lines, -3 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/stub_code_ia32.cc
|
View
|
|
1 chunk |
+8 lines, -5 lines |
2 comments
|
Download
|
 |
M |
runtime/vm/stub_code_mips.cc
|
View
|
|
1 chunk |
+7 lines, -8 lines |
0 comments
|
Download
|
 |
M |
runtime/vm/stub_code_x64.cc
|
View
|
|
1 chunk |
+7 lines, -4 lines |
2 comments
|
Download
|
Total messages: 7 (0 generated)
|