Adds StoreIntoObject for arm64.

Adds StoreIntoObject for arm64.

R=regis@google.com

Committed: https://code.google.com/p/dart/source/detail?r=35277

[regis, 2014-04-22 18:45:31]

LGTM with some suggestions.

https://codereview.chromium.org/247023004/diff/1/runtime/vm/assembler_arm64.cc
File runtime/vm/assembler_arm64.cc (right):

https://codereview.chromium.org/247023004/diff/1/runtime/vm/assembler_arm64.c...
runtime/vm/assembler_arm64.cc:596: // To check that, we compute value & ~object
and skip the write barrier
value & ~object is a 'bit clear' operation.

Instead of

orn(TMP, ZR, Operand(object));
and_(TMP, value, Operand(TMP));

use

bic(TMP, value, Operand(object));

https://codereview.chromium.org/247023004/diff/1/runtime/vm/assembler_arm64.c...
runtime/vm/assembler_arm64.cc:616: tsti(TMP, kNewObjectAlignmentOffset);
Instead of

Lsl(TMP, value, kObjectAlignmentLog2 - 1);
and_(TMP, value, Operand(TMP));
orn(TMP2, ZR, Operand(object));
and_(TMP, TMP, Operand(TMP2));

use

and_(TMP, value, Operand(value, LSL, kObjectAlignmentLog2 - 1));
bic(TMP, TMP, Operand(object));

This is ARM, not MIPS :-)

https://codereview.chromium.org/247023004/diff/1/runtime/vm/constants_arm64.h
File runtime/vm/constants_arm64.h (right):

https://codereview.chromium.org/247023004/diff/1/runtime/vm/constants_arm64.h...
runtime/vm/constants_arm64.h:165: const int kDartVolatileCpuRegCount = 17;
For people questioning your math, I would add ...17;  // Excluding R16 and R17.

https://codereview.chromium.org/247023004/diff/1/runtime/vm/stub_code_arm64.cc
File runtime/vm/stub_code_arm64.cc (right):

https://codereview.chromium.org/247023004/diff/1/runtime/vm/stub_code_arm64.c...
runtime/vm/stub_code_arm64.cc:350: __ ret();
How frequent is this ret()?
If we return frequently, you may wait spilling these 3 registers and use TMP
instead of R2.

[zra, 2014-04-22 19:44:02]

Thanks!

https://codereview.chromium.org/247023004/diff/1/runtime/vm/assembler_arm64.cc
File runtime/vm/assembler_arm64.cc (right):

https://codereview.chromium.org/247023004/diff/1/runtime/vm/assembler_arm64.c...
runtime/vm/assembler_arm64.cc:596: // To check that, we compute value & ~object
and skip the write barrier
On 2014/04/22 18:45:32, regis wrote:
> value & ~object is a 'bit clear' operation.
> 
> Instead of
> 
> orn(TMP, ZR, Operand(object));
> and_(TMP, value, Operand(TMP));
> 
> use
> 
> bic(TMP, value, Operand(object));

Done.

https://codereview.chromium.org/247023004/diff/1/runtime/vm/assembler_arm64.c...
runtime/vm/assembler_arm64.cc:616: tsti(TMP, kNewObjectAlignmentOffset);
On 2014/04/22 18:45:32, regis wrote:
> Instead of
> 
> Lsl(TMP, value, kObjectAlignmentLog2 - 1);
> and_(TMP, value, Operand(TMP));
> orn(TMP2, ZR, Operand(object));
> and_(TMP, TMP, Operand(TMP2));
> 
> use
> 
> and_(TMP, value, Operand(value, LSL, kObjectAlignmentLog2 - 1));
> bic(TMP, TMP, Operand(object));
> 
> This is ARM, not MIPS :-)

Done.

https://codereview.chromium.org/247023004/diff/1/runtime/vm/constants_arm64.h
File runtime/vm/constants_arm64.h (right):

https://codereview.chromium.org/247023004/diff/1/runtime/vm/constants_arm64.h...
runtime/vm/constants_arm64.h:165: const int kDartVolatileCpuRegCount = 17;
On 2014/04/22 18:45:32, regis wrote:
> For people questioning your math, I would add ...17;  // Excluding R16 and
R17.

Done.

https://codereview.chromium.org/247023004/diff/1/runtime/vm/stub_code_arm64.cc
File runtime/vm/stub_code_arm64.cc (right):

https://codereview.chromium.org/247023004/diff/1/runtime/vm/stub_code_arm64.c...
runtime/vm/stub_code_arm64.cc:350: __ ret();
On 2014/04/22 18:45:32, regis wrote:
> How frequent is this ret()?
> If we return frequently, you may wait spilling these 3 registers and use TMP
> instead of R2.

Done.

[zra, 2014-04-22 19:44:15]

Committed patchset #2 manually as r35277 (presubmit successful).