Implements ARM SIMD multiplication and subtraction instructions.

Implements ARM SIMD multiplication and subtraction instructions.

R=regis@google.com

Committed: https://code.google.com/p/dart/source/detail?r=25052

[regis, 2013-07-16 00:23:30]

LGTM with a few suggestions.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test.cc
File runtime/vm/assembler_arm_test.cc (right):

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test...
runtime/vm/assembler_arm_test.cc:1745: __ vmovsr(S3, R0);
Being picky, but a test using a different value in each register would have a
broader coverage.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test...
runtime/vm/assembler_arm_test.cc:1752: __ vsubqi(0, Q2, Q1, Q0);
Comment about the meaning of 0 until you introduce an enum?

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test...
runtime/vm/assembler_arm_test.cc:1790: __ vsubqi(1, Q2, Q1, Q0);
ditto for 1?

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test...
runtime/vm/assembler_arm_test.cc:2089: __ LoadImmediate(R0, 42);
24?

https://codereview.chromium.org/19290006/diff/1/runtime/vm/constants_arm.h
File runtime/vm/constants_arm.h (right):

https://codereview.chromium.org/19290006/diff/1/runtime/vm/constants_arm.h#ne...
runtime/vm/constants_arm.h:178: const DRegister DTMP = D14;  // Overlaps with
STMP.
... = EvenDRegisterOf(QTMP);

https://codereview.chromium.org/19290006/diff/1/runtime/vm/constants_arm.h#ne...
runtime/vm/constants_arm.h:179: const SRegister STMP = S28;
... = EvenSRegisterOf(DTMP);

https://codereview.chromium.org/19290006/diff/1/runtime/vm/disassembler_arm.cc
File runtime/vm/disassembler_arm.cc (right):

https://codereview.chromium.org/19290006/diff/1/runtime/vm/disassembler_arm.c...
runtime/vm/disassembler_arm.cc:1274: Format(instr, "vadd.'sz 'qd, 'qn, 'qm");
This will print 'vadd.I16' for example. So far, we tried to stick to our own
assembler syntax. Here, we use vaddqi, where i is defined by an argument. So it
may be better to print 'vaddqb', vaddqh', or 'vaddqw'.
Just a remark. Not insisting on it.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/disassembler_arm.c...
runtime/vm/disassembler_arm.cc:1277: Format(instr, "vadd.F32 'qd, 'qn, 'qm");
If we apply the logic above, this would be 'vaddqs'.

[zra, 2013-07-16 16:11:01]

Thanks!

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test.cc
File runtime/vm/assembler_arm_test.cc (right):

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test...
runtime/vm/assembler_arm_test.cc:1745: __ vmovsr(S3, R0);
On 2013/07/16 00:23:30, regis wrote:
> Being picky, but a test using a different value in each register would have a
> broader coverage.

Done.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test...
runtime/vm/assembler_arm_test.cc:1752: __ vsubqi(0, Q2, Q1, Q0);
On 2013/07/16 00:23:30, regis wrote:
> Comment about the meaning of 0 until you introduce an enum?

Done.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test...
runtime/vm/assembler_arm_test.cc:1790: __ vsubqi(1, Q2, Q1, Q0);
On 2013/07/16 00:23:30, regis wrote:
> ditto for 1?

Done.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/assembler_arm_test...
runtime/vm/assembler_arm_test.cc:2089: __ LoadImmediate(R0, 42);
On 2013/07/16 00:23:30, regis wrote:
> 24?

Done.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/constants_arm.h
File runtime/vm/constants_arm.h (right):

https://codereview.chromium.org/19290006/diff/1/runtime/vm/constants_arm.h#ne...
runtime/vm/constants_arm.h:178: const DRegister DTMP = D14;  // Overlaps with
STMP.
On 2013/07/16 00:23:30, regis wrote:
> ... = EvenDRegisterOf(QTMP);

Done.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/constants_arm.h#ne...
runtime/vm/constants_arm.h:179: const SRegister STMP = S28;
On 2013/07/16 00:23:30, regis wrote:
> ... = EvenSRegisterOf(DTMP);

Done.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/disassembler_arm.cc
File runtime/vm/disassembler_arm.cc (right):

https://codereview.chromium.org/19290006/diff/1/runtime/vm/disassembler_arm.c...
runtime/vm/disassembler_arm.cc:1274: Format(instr, "vadd.'sz 'qd, 'qn, 'qm");
On 2013/07/16 00:23:30, regis wrote:
> This will print 'vadd.I16' for example. So far, we tried to stick to our own
> assembler syntax. Here, we use vaddqi, where i is defined by an argument. So
it
> may be better to print 'vaddqb', vaddqh', or 'vaddqw'.
> Just a remark. Not insisting on it.

Done.

https://codereview.chromium.org/19290006/diff/1/runtime/vm/disassembler_arm.c...
runtime/vm/disassembler_arm.cc:1277: Format(instr, "vadd.F32 'qd, 'qn, 'qm");
On 2013/07/16 00:23:30, regis wrote:
> If we apply the logic above, this would be 'vaddqs'.

Done.

[zra, 2013-07-16 16:14:00]

Committed patchset #2 manually as r25052 (presubmit successful).

[regis, 2013-07-16 16:57:38]

Thanks for making all these changes!
One more, maybe :-)

https://codereview.chromium.org/19290006/diff/8001/runtime/vm/disassembler_ar...
File runtime/vm/disassembler_arm.cc (right):

https://codereview.chromium.org/19290006/diff/8001/runtime/vm/disassembler_ar...
runtime/vm/disassembler_arm.cc:1282: Format(instr, "vaddqi'sz 'qd, 'qn, 'qm");
Isn't the 'i' redundant, since it is replaced by b, h, or w?