Implements catch on MIPS.

Implements catch on MIPS.
Enables UnhandledException test for MIPS.

Committed: https://code.google.com/p/dart/source/detail?r=21898

[regis, 2013-04-23 17:24:48]

LGTM, with a surprising choice of registers, though.

https://codereview.chromium.org/14289006/diff/2002/runtime/vm/constants_mips.h
File runtime/vm/constants_mips.h (right):

https://codereview.chromium.org/14289006/diff/2002/runtime/vm/constants_mips....
runtime/vm/constants_mips.h:159: const Register kStackTraceObjectReg = A1;
I would have expected both registers to be neighbors, since they are used
together, almost as a pair of arguments to the catch entry. A0 and A1, or V0 and
V1, etc... It seems a bit odd to pick unrelated registers V0 and A1.

https://codereview.chromium.org/14289006/diff/2002/runtime/vm/stub_code_mips.cc
File runtime/vm/stub_code_mips.cc (right):

https://codereview.chromium.org/14289006/diff/2002/runtime/vm/stub_code_mips....
runtime/vm/stub_code_mips.cc:1599: // A0: program_counter.
V0?
You read from V0 in the code, but it seems strange to pass the first argument in
V0 and the following ones in A1, A2, and A3.

[zra, 2013-04-23 18:03:57]

Thanks!

https://codereview.chromium.org/14289006/diff/2002/runtime/vm/constants_mips.h
File runtime/vm/constants_mips.h (right):

https://codereview.chromium.org/14289006/diff/2002/runtime/vm/constants_mips....
runtime/vm/constants_mips.h:159: const Register kStackTraceObjectReg = A1;
On 2013/04/23 17:24:49, regis wrote:
> I would have expected both registers to be neighbors, since they are used
> together, almost as a pair of arguments to the catch entry. A0 and A1, or V0
and
> V1, etc... It seems a bit odd to pick unrelated registers V0 and A1.

kExceptionObjectReg has to be V0, at least so that the exception object is
returned correctly from the Simulator. So, I've changed A1 to be V1.

https://codereview.chromium.org/14289006/diff/2002/runtime/vm/stub_code_mips.cc
File runtime/vm/stub_code_mips.cc (right):

https://codereview.chromium.org/14289006/diff/2002/runtime/vm/stub_code_mips....
runtime/vm/stub_code_mips.cc:1599: // A0: program_counter.
On 2013/04/23 17:24:49, regis wrote:
> V0?
> You read from V0 in the code, but it seems strange to pass the first argument
in
> V0 and the following ones in A1, A2, and A3.

You're right, V0 in the code should have been A0.

[zra, 2013-04-23 18:15:57]

Committed patchset #3 manually as r21898 (presubmit successful).

[regis, 2013-04-23 18:46:18]

https://codereview.chromium.org/14289006/diff/10001/runtime/vm/stub_code_mips.cc
File runtime/vm/stub_code_mips.cc (right):

https://codereview.chromium.org/14289006/diff/10001/runtime/vm/stub_code_mips...
runtime/vm/stub_code_mips.cc:1609: __ mov(RA, A0);  // Program counter.
You do not need temp registers TMP1 and RA anymore, since you do not have any
overlap anymore.