[MIPS] Adding validator for MIPS architecture.

src/trusted/validator_mips/testdata/test_loads.S

+# Copyright 2012 The Native Client Authors.  All rights reserved.
+# Use of this source code is governed by a BSD-style license that can
+# be found in the LICENSE file.
+# Copyright 2012 MIPS Technologies / RT-RK.
+
+
+# test if all load instrs are recognized as such
+# test if load from sp is allowed
+# test if mask and instr are split w/ delay slot
+# test if mask and inst are in the same bundle
+
+# load from guard regions...
+
+
+.globl _start
+_start:
+.align 4
+.set noreorder
+.set STORE_MASK,$t7
+
+#check masked load
+   and     $a0, $a0, STORE_MASK
+   lw      $v0, 16($a0)
+   nop
+   nop
+
+#test if all load instrs are recognized as such
+
+bundle_load_instrs:
+   lb      $a0, 4($a1)                #error, unsafe load, no mask
+   lw      $a0, 4($a1)                #error, unsafe load, no mask
+   lbu     $a0, 4($a1)                #error, unsafe load, no mask
+   ldc1    $f0, 4($a1)                #error, unsafe load, no mask
+
+   ldc2    $10, -24($a1)              #error, unsafe load, no mask
+   lh      $a0, 4($a1)                #error, unsafe load, no mask
+   lhu     $a0, 4($a1)                #error, unsafe load, no mask
+   ll      $a0, 4($a1)                #error, unsafe load, no mask
+
+   lw      $a0, 4($a1)                #error, unsafe load, no mask
+   lwc1    $f0, 4($a1)                #error, unsafe load, no mask
+   lwc2    $10, 4($a1)                #error, unsafe load, no mask
+   lwl     $a0, 4($a1)                #error, unsafe load, no mask
+
+   lwr     $a0, 4($a1)                #error, unsafe load, no mask
+   ldxc1   $f0, $0($a1)               #forbidden instruction, unsafe load
+   luxc1   $f0, $a2($a1)              #forbidden instruction, unsafe load
+   lwxc1   $f6, $v0($a1)              #forbidden instruction, unsafe load
+
+#test if load from sp is allowed
+
+bundle_load_from_sp:
+   lw      $v0, 16($sp)
+   nop
+   and     $t2, $t2, STORE_MASK
+   lw      $t1, 16($t2)
+
+bundle_chk_delay_slot:
+   b       bundle_chk_bundle_cross_1
+    and    $s0, $s0, STORE_MASK       #ok
+   lw      $a0, 16($s0)
+   nop
+
+bundle_chk_bundle_cross_1:
+   nop
+   nop
+   nop
+   and     $a3, $a3, STORE_MASK
+
+
+bundle_chk_bundle_cross_2:
+   lw      $a3, 16($a3)               #error, pattern crosses bundle
+   nop
+   nop
+   nop
+
+   lbux    $a3, $t2($t3)
+   lhx     $a1, $a2($a3)
+   lwx     $t1, $t2($t3)
+   nop
+
+end_of_code: