Cleanup include guards:

src/arm/assembler-arm-inl.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 16 matching lines @@
 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 // HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 // STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 // OF THE POSSIBILITY OF SUCH DAMAGE.
 
 // The original source code covered by the above license above has been modified
 // significantly by Google Inc.
 // Copyright 2006-2008 the V8 project authors. All rights reserved.
 
-#ifndef V8_ASSEMBLER_ARM_INL_H_
-#define V8_ASSEMBLER_ARM_INL_H_
+#ifndef V8_ARM_ASSEMBLER_ARM_INL_H_
+#define V8_ARM_ASSEMBLER_ARM_INL_H_
 
 #include "arm/assembler-arm.h"
 #include "cpu.h"
 
 
 namespace v8 { namespace internal {
 
 Condition NegateCondition(Condition cc) {
   ASSERT(cc != al);
   return static_cast<Condition>(cc ^ ne);
@@ skipping 190 matching lines @@
   // after patching a target address in the code as follows:
   //   CPU::FlushICache(pc, sizeof(target));
   // However, on ARM, no instruction was actually patched by the assignment
   // above; the target address is not part of an instruction, it is patched in
   // the constant pool and is read via a data access; the instruction accessing
   // this address in the constant pool remains unchanged.
 }
 
 } }  // namespace v8::internal
 
-#endif  // V8_ASSEMBLER_ARM_INL_H_
+#endif  // V8_ARM_ASSEMBLER_ARM_INL_H_