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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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234 times_pointer_size = times_4, | 234 times_pointer_size = times_4, |
235 times_twice_pointer_size = times_8 | 235 times_twice_pointer_size = times_8 |
236 }; | 236 }; |
237 | 237 |
238 | 238 |
239 class Operand BASE_EMBEDDED { | 239 class Operand BASE_EMBEDDED { |
240 public: | 240 public: |
241 // reg | 241 // reg |
242 INLINE(explicit Operand(Register reg)); | 242 INLINE(explicit Operand(Register reg)); |
243 | 243 |
| 244 // XMM reg |
| 245 INLINE(explicit Operand(XMMRegister xmm_reg)); |
| 246 |
244 // [disp/r] | 247 // [disp/r] |
245 INLINE(explicit Operand(int32_t disp, RelocInfo::Mode rmode)); | 248 INLINE(explicit Operand(int32_t disp, RelocInfo::Mode rmode)); |
246 // disp only must always be relocated | 249 // disp only must always be relocated |
247 | 250 |
248 // [base + disp/r] | 251 // [base + disp/r] |
249 explicit Operand(Register base, int32_t disp, | 252 explicit Operand(Register base, int32_t disp, |
250 RelocInfo::Mode rmode = RelocInfo::NONE); | 253 RelocInfo::Mode rmode = RelocInfo::NONE); |
251 | 254 |
252 // [base + index*scale + disp/r] | 255 // [base + index*scale + disp/r] |
253 explicit Operand(Register base, | 256 explicit Operand(Register base, |
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702 void fst_d(const Operand& adr); | 705 void fst_d(const Operand& adr); |
703 | 706 |
704 void fild_s(const Operand& adr); | 707 void fild_s(const Operand& adr); |
705 void fild_d(const Operand& adr); | 708 void fild_d(const Operand& adr); |
706 | 709 |
707 void fist_s(const Operand& adr); | 710 void fist_s(const Operand& adr); |
708 | 711 |
709 void fistp_s(const Operand& adr); | 712 void fistp_s(const Operand& adr); |
710 void fistp_d(const Operand& adr); | 713 void fistp_d(const Operand& adr); |
711 | 714 |
| 715 // The fisttp instructions require SSE3. |
712 void fisttp_s(const Operand& adr); | 716 void fisttp_s(const Operand& adr); |
713 void fisttp_d(const Operand& adr); | 717 void fisttp_d(const Operand& adr); |
714 | 718 |
715 void fabs(); | 719 void fabs(); |
716 void fchs(); | 720 void fchs(); |
717 void fcos(); | 721 void fcos(); |
718 void fsin(); | 722 void fsin(); |
719 | 723 |
720 void fadd(int i); | 724 void fadd(int i); |
721 void fsub(int i); | 725 void fsub(int i); |
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928 private: | 932 private: |
929 Assembler* assembler_; | 933 Assembler* assembler_; |
930 #ifdef DEBUG | 934 #ifdef DEBUG |
931 int space_before_; | 935 int space_before_; |
932 #endif | 936 #endif |
933 }; | 937 }; |
934 | 938 |
935 } } // namespace v8::internal | 939 } } // namespace v8::internal |
936 | 940 |
937 #endif // V8_IA32_ASSEMBLER_IA32_H_ | 941 #endif // V8_IA32_ASSEMBLER_IA32_H_ |
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