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Issue 9418005: Ensure using byte registers for byte instructions on ia32 and x64. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: . Created 8 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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25 // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 25 // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 // (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 // (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 // HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 28 // HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29 // STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 // STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 30 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
31 // OF THE POSSIBILITY OF SUCH DAMAGE. 31 // OF THE POSSIBILITY OF SUCH DAMAGE.
32 32
33 // The original source code covered by the above license above has been modified 33 // The original source code covered by the above license above has been modified
34 // significantly by Google Inc. 34 // significantly by Google Inc.
35 // Copyright 2011 the V8 project authors. All rights reserved. 35 // Copyright 2011 the V8 project authors. All rights reserved.
Jakob Kummerow 2012/02/16 12:46:02 2012
36 36
37 #include "v8.h" 37 #include "v8.h"
38 38
39 #if defined(V8_TARGET_ARCH_IA32) 39 #if defined(V8_TARGET_ARCH_IA32)
40 40
41 #include "disassembler.h" 41 #include "disassembler.h"
42 #include "macro-assembler.h" 42 #include "macro-assembler.h"
43 #include "serialize.h" 43 #include "serialize.h"
44 44
45 namespace v8 { 45 namespace v8 {
(...skipping 522 matching lines...) Expand 10 before | Expand all | Expand 10 after
568 } 568 }
569 569
570 570
571 void Assembler::leave() { 571 void Assembler::leave() {
572 EnsureSpace ensure_space(this); 572 EnsureSpace ensure_space(this);
573 EMIT(0xC9); 573 EMIT(0xC9);
574 } 574 }
575 575
576 576
577 void Assembler::mov_b(Register dst, const Operand& src) { 577 void Assembler::mov_b(Register dst, const Operand& src) {
578 ASSERT(dst.code() < 4); 578 CHECK(dst.is_byte_register());
579 EnsureSpace ensure_space(this); 579 EnsureSpace ensure_space(this);
580 EMIT(0x8A); 580 EMIT(0x8A);
581 emit_operand(dst, src); 581 emit_operand(dst, src);
582 } 582 }
583 583
584 584
585 void Assembler::mov_b(const Operand& dst, int8_t imm8) { 585 void Assembler::mov_b(const Operand& dst, int8_t imm8) {
586 EnsureSpace ensure_space(this); 586 EnsureSpace ensure_space(this);
587 EMIT(0xC6); 587 EMIT(0xC6);
588 emit_operand(eax, dst); 588 emit_operand(eax, dst);
589 EMIT(imm8); 589 EMIT(imm8);
590 } 590 }
591 591
592 592
593 void Assembler::mov_b(const Operand& dst, Register src) { 593 void Assembler::mov_b(const Operand& dst, Register src) {
594 ASSERT(src.code() < 4); 594 CHECK(src.is_byte_register());
595 EnsureSpace ensure_space(this); 595 EnsureSpace ensure_space(this);
596 EMIT(0x88); 596 EMIT(0x88);
597 emit_operand(src, dst); 597 emit_operand(src, dst);
598 } 598 }
599 599
600 600
601 void Assembler::mov_w(Register dst, const Operand& src) { 601 void Assembler::mov_w(Register dst, const Operand& src) {
602 EnsureSpace ensure_space(this); 602 EnsureSpace ensure_space(this);
603 EMIT(0x66); 603 EMIT(0x66);
604 EMIT(0x8B); 604 EMIT(0x8B);
(...skipping 217 matching lines...) Expand 10 before | Expand all | Expand 10 after
822 EMIT(0x3C); 822 EMIT(0x3C);
823 } else { 823 } else {
824 EMIT(0x80); 824 EMIT(0x80);
825 emit_operand(edi, op); // edi == 7 825 emit_operand(edi, op); // edi == 7
826 } 826 }
827 EMIT(imm8); 827 EMIT(imm8);
828 } 828 }
829 829
830 830
831 void Assembler::cmpb(const Operand& op, Register reg) { 831 void Assembler::cmpb(const Operand& op, Register reg) {
832 ASSERT(reg.is_byte_register()); 832 CHECK(reg.is_byte_register());
833 EnsureSpace ensure_space(this); 833 EnsureSpace ensure_space(this);
834 EMIT(0x38); 834 EMIT(0x38);
835 emit_operand(reg, op); 835 emit_operand(reg, op);
836 } 836 }
837 837
838 838
839 void Assembler::cmpb(Register reg, const Operand& op) { 839 void Assembler::cmpb(Register reg, const Operand& op) {
840 ASSERT(reg.is_byte_register()); 840 CHECK(reg.is_byte_register());
841 EnsureSpace ensure_space(this); 841 EnsureSpace ensure_space(this);
842 EMIT(0x3A); 842 EMIT(0x3A);
843 emit_operand(reg, op); 843 emit_operand(reg, op);
844 } 844 }
845 845
846 846
847 void Assembler::cmpw(const Operand& op, Immediate imm16) { 847 void Assembler::cmpw(const Operand& op, Immediate imm16) {
848 ASSERT(imm16.is_int16()); 848 ASSERT(imm16.is_int16());
849 EnsureSpace ensure_space(this); 849 EnsureSpace ensure_space(this);
850 EMIT(0x66); 850 EMIT(0x66);
(...skipping 43 matching lines...) Expand 10 before | Expand all | Expand 10 after
894 894
895 void Assembler::cmpw_ax(const Operand& op) { 895 void Assembler::cmpw_ax(const Operand& op) {
896 EnsureSpace ensure_space(this); 896 EnsureSpace ensure_space(this);
897 EMIT(0x66); 897 EMIT(0x66);
898 EMIT(0x39); // CMP r/m16, r16 898 EMIT(0x39); // CMP r/m16, r16
899 emit_operand(eax, op); // eax has same code as register ax. 899 emit_operand(eax, op); // eax has same code as register ax.
900 } 900 }
901 901
902 902
903 void Assembler::dec_b(Register dst) { 903 void Assembler::dec_b(Register dst) {
904 CHECK(dst.is_byte_register());
904 EnsureSpace ensure_space(this); 905 EnsureSpace ensure_space(this);
905 EMIT(0xFE); 906 EMIT(0xFE);
906 EMIT(0xC8 | dst.code()); 907 EMIT(0xC8 | dst.code());
907 } 908 }
908 909
909 910
910 void Assembler::dec_b(const Operand& dst) { 911 void Assembler::dec_b(const Operand& dst) {
911 EnsureSpace ensure_space(this); 912 EnsureSpace ensure_space(this);
912 EMIT(0xFE); 913 EMIT(0xFE);
913 emit_operand(ecx, dst); 914 emit_operand(ecx, dst);
(...skipping 283 matching lines...) Expand 10 before | Expand all | Expand 10 after
1197 1198
1198 1199
1199 void Assembler::test(Register reg, const Operand& op) { 1200 void Assembler::test(Register reg, const Operand& op) {
1200 EnsureSpace ensure_space(this); 1201 EnsureSpace ensure_space(this);
1201 EMIT(0x85); 1202 EMIT(0x85);
1202 emit_operand(reg, op); 1203 emit_operand(reg, op);
1203 } 1204 }
1204 1205
1205 1206
1206 void Assembler::test_b(Register reg, const Operand& op) { 1207 void Assembler::test_b(Register reg, const Operand& op) {
1208 CHECK(reg.is_byte_register());
1207 EnsureSpace ensure_space(this); 1209 EnsureSpace ensure_space(this);
1208 EMIT(0x84); 1210 EMIT(0x84);
1209 emit_operand(reg, op); 1211 emit_operand(reg, op);
1210 } 1212 }
1211 1213
1212 1214
1213 void Assembler::test(const Operand& op, const Immediate& imm) { 1215 void Assembler::test(const Operand& op, const Immediate& imm) {
1214 EnsureSpace ensure_space(this); 1216 EnsureSpace ensure_space(this);
1215 EMIT(0xF7); 1217 EMIT(0xF7);
1216 emit_operand(eax, op); 1218 emit_operand(eax, op);
1217 emit(imm); 1219 emit(imm);
1218 } 1220 }
1219 1221
1220 1222
1221 void Assembler::test_b(const Operand& op, uint8_t imm8) { 1223 void Assembler::test_b(const Operand& op, uint8_t imm8) {
1222 if (op.is_reg_only() && op.reg().code() >= 4) { 1224 if (op.is_reg_only() && !op.reg().is_byte_register()) {
1223 test(op, Immediate(imm8)); 1225 test(op, Immediate(imm8));
1224 return; 1226 return;
1225 } 1227 }
1226 EnsureSpace ensure_space(this); 1228 EnsureSpace ensure_space(this);
1227 EMIT(0xF6); 1229 EMIT(0xF6);
1228 emit_operand(eax, op); 1230 emit_operand(eax, op);
1229 EMIT(imm8); 1231 EMIT(imm8);
1230 } 1232 }
1231 1233
1232 1234
(...skipping 1380 matching lines...) Expand 10 before | Expand all | Expand 10 after
2613 fprintf(coverage_log, "%s\n", file_line); 2615 fprintf(coverage_log, "%s\n", file_line);
2614 fflush(coverage_log); 2616 fflush(coverage_log);
2615 } 2617 }
2616 } 2618 }
2617 2619
2618 #endif 2620 #endif
2619 2621
2620 } } // namespace v8::internal 2622 } } // namespace v8::internal
2621 2623
2622 #endif // V8_TARGET_ARCH_IA32 2624 #endif // V8_TARGET_ARCH_IA32
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